Invention Grant
- Patent Title: Methods for fabricating integrated circuits using flowable chemical vapor deposition techniques with low-temperature thermal annealing
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Application No.: US14797337Application Date: 2015-07-13
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Publication No.: US09831098B2Publication Date: 2017-11-28
- Inventor: Xinyuan Dou , Sukwon Hong , Satyajit Shinde , Sandeep Gaan , Tao Han , Carlos Chacon , Shimpei Yamaguchi
- Applicant: GLOBALFOUNDRIES, Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Lorenz & Kopf, LLP
- Main IPC: H01L21/3105
- IPC: H01L21/3105 ; H01L29/423 ; H01L29/66 ; H01L21/762

Abstract:
Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming an isolation trench between two fin structures on an integrated circuit substrate, forming a flowable film in the isolation trench using a flowable chemical vapor deposition process, and annealing the flowable film to form a silicon oxide dielectric layer in the isolation trench. The annealing is performed at a temperature of less than about 200° C. with a process gas including N2 and H2O2.
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