- 专利标题： Barrier layer and structure method
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申请号： US14181493申请日： 2014-02-14
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公开(公告)号： US09847296B2公开(公告)日： 2017-12-19
- 发明人: Chih-Chung Chang , Jung-Chih Tsao , Chun Che Lin , Yu-Ming Huang , Tain-Shang Chang , Jian-Shin Tsai
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Slater Matsil, LLP
- 主分类号： H01L21/44
- IPC分类号： H01L21/44 ; H01L23/532 ; H01L21/768
摘要：
A method for forming a multilayer barrier comprises forming a conductive line over a substrate, depositing a dielectric layer over the conductive line, forming a plug opening in the dielectric layer, forming a multilayer barrier through a plurality of deposition processes and corresponding plasma treatment processes.
公开/授权文献
- US20150235954A1 Barrier Layer and Structure Method 公开/授权日：2015-08-20
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