- Patent Title: Self-aligned multiple patterning semiconductor device fabrication
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Application No.: US15096560Application Date: 2016-04-12
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Publication No.: US09847339B2Publication Date: 2017-12-19
- Inventor: Yu-Min Hung , Chien-Ying Lee , Tzung-Ting Han
- Applicant: Macronix International Co., Ltd.
- Applicant Address: TW Hsin-chu
- Assignee: Macronix International Co., Ltd.
- Current Assignee: Macronix International Co., Ltd.
- Current Assignee Address: TW Hsin-chu
- Agency: Alston & Bird LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L27/11521 ; H01L23/528 ; H01L29/788 ; H01L21/311 ; H01L21/3213

Abstract:
Various embodiments provide a self-merged profile (SMP) method for fabricating a semiconductor device and a device fabricated using an SMP method. In an example embodiment, a semiconductor device is provided. The example semiconductor device comprises (a) a plurality of conductive lines; (b) a plurality of conductive pads; (c) a plurality of dummy tails; and (d) a plurality of closed loops. Each of the plurality of conductive pads is associated with one of the plurality of conductive lines, one of the plurality of dummy tails, and one of the plurality of closed loops. In example embodiments, the plurality of dummy tails and the plurality of closed loops are formed as residuals of the process used to create the plurality of conductive lines and the plurality of conductive pads.
Public/Granted literature
- US20170294442A1 SELF-ALIGNED MULTIPLE PATTERNING SEMICONDUCTOR DEVICE FABRICATION Public/Granted day:2017-10-12
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