- Patent Title: Metal-oxide semiconductor (MOS) transistor offset-cancelling (OC), zero-sensing (ZS) dead zone, current-latched sense amplifiers (SAs) (CLSAs) (OCZS-SAs) for sensing differential voltages
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Application No.: US15274034Application Date: 2016-09-23
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Publication No.: US09852783B1Publication Date: 2017-12-26
- Inventor: Taehui Na , Byung Kyu Song , Seong-Ook Jung , Jung Pill Kim , Seung Hyuk Kang
- Applicant: QUALCOMM TECHNOLOGIES, Inc. , Industry-Academic Cooperation Foundation, Yonsei University
- Applicant Address: US CA San Diego KR Seoul
- Assignee: QUALCOMM Technologies, Inc.,Industry-Academic Cooperation Foundation, Yonsei University
- Current Assignee: QUALCOMM Technologies, Inc.,Industry-Academic Cooperation Foundation, Yonsei University
- Current Assignee Address: US CA San Diego KR Seoul
- Agency: Withrow & Terranova, PLLC
- Main IPC: G11C11/16
- IPC: G11C11/16

Abstract:
Metal-oxide semiconductor (MOS) transistor offset-cancelling (OC), zero-sensing (ZS) dead zone, current-latched sense amplifiers (SAs) (CLSAs) (OCZS-SAs) for sensing differential voltages are provided. An OCZS-SA is configured to amplify received differential data and reference input voltages with a smaller sense amplifier offset voltage to provide larger sense margin between different storage states of memory bitcell(s). The OCZS-SA is configured to cancel out offset voltages of input and complement input transistors, and keep the input and complement input transistors in their activated state during sensing phases so that sensing is not performed in their “dead zones” when their gate-to-source voltage (Vgs) is below their respective threshold voltages. In other aspects, sense amplifier capacitors are configured to directly store the data and reference input voltages at gates of the input and complement input transistors during voltage capture phases to avoid additional layout area that would otherwise be consumed with additional sensing capacitor circuits.
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