- 专利标题: Method of manufacturing a trench FET having a merged gate dielectric
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申请号: US15186133申请日: 2016-06-17
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公开(公告)号: US09853142B2公开(公告)日: 2017-12-26
- 发明人: Ling Ma
- 申请人: Infineon Technologies Americas Corp.
- 申请人地址: US CA El Segundo
- 专利权人: Infineon Technologies Americas Corp.
- 当前专利权人: Infineon Technologies Americas Corp.
- 当前专利权人地址: US CA El Segundo
- 代理机构: Murphy, Bilak & Homiller, PLLC
- 主分类号: H01L21/02
- IPC分类号: H01L21/02 ; H01L21/306 ; H01L29/66 ; H01L29/40 ; H01L29/78 ; H01L29/423 ; H01L29/08 ; H01L29/10
摘要:
In one implementation, a method for fabricating a trench FET includes providing a semiconductor substrate including a drain region and a drift zone over the drain region, forming a plurality of depletion trenches over the drain region, each of the plurality of depletion trenches having a depletion trench dielectric and a depletion electrode, and forming a respective bordering gate trench alongside each of the plurality of depletion trenches, each bordering gate trench having a gate electrode and a gate dielectric.
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