Invention Grant
- Patent Title: Multi-level chip interconnect
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Application No.: US14986727Application Date: 2016-01-04
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Publication No.: US09871017B2Publication Date: 2018-01-16
- Inventor: Peter Ossimitz , Tobias Jacobs
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Slater Matsil, LLP
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/522 ; H01L23/528 ; H01L23/31 ; H01L23/532 ; H01L21/66 ; H01L25/00 ; H01L21/768
Abstract:
Representative implementations of devices and techniques provide optimized electrical performance of interconnectivity components of multi-layer integrated circuits (IC) such as chip dice, for example. Different layers of the multi-layer IC include contact terminals that may be used to connect to circuits, systems, and carriers external to the IC.
Public/Granted literature
- US20170194288A1 MULTI-LEVEL CHIP INTERCONNECT Public/Granted day:2017-07-06
Information query
IPC分类:
