- 专利标题： Memory architecture and cell design employing two access transistors
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申请号： US14277282申请日： 2014-05-14
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公开(公告)号： US09875795B2公开(公告)日： 2018-01-23
- 发明人: Jun Liu
- 申请人： Micron Technology, Inc.
- 申请人地址： US ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： US ID Boise
- 代理机构： Schwegman Lundberg & Woessner, P.A.
- 主分类号： G11C13/00
- IPC分类号： G11C13/00 ; G11C11/16 ; H01L27/24 ; G11C17/16 ; H01L45/00
摘要：
Some embodiments include an improved memory array architecture and memory cell design. In one of such embodiments, a memory cell may comprise a memory element to store a logic state and two access transistors coupled to the memory element to access the logic state of the memory element. Other embodiments are described.
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