Invention Grant
- Patent Title: Structures to avoid floating RESURF layer in high voltage lateral devices
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Application No.: US14634801Application Date: 2015-02-28
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Publication No.: US09876071B2Publication Date: 2018-01-23
- Inventor: Yongxi Zhang , Philip L Hower , John Lin , Guru Mathur , Scott G. Balster , Constantin Bulucea , Zachary K. Lee , Sameer P Pendharkar
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/78 ; H01L29/10 ; H01L23/485 ; H01L29/423

Abstract:
A semiconductor device contains an LDNMOS transistor with a lateral n-type drain drift region and a p-type RESURF region over the drain drift region. The RESURF region extends to a top surface of a substrate of the semiconductor device. The semiconductor device includes a shunt which is electrically coupled between the RESURF region and a low voltage node of the LDNMOS transistor. The shunt may be a p-type implanted layer in the substrate between the RESURF layer and a body of the LDNMOS transistor, and may be implanted concurrently with the RESURF layer. The shunt may be through an opening in the drain drift region from the RESURF layer to the substrate under the drain drift region. The shunt may be include metal interconnect elements including contacts and metal interconnect lines.
Public/Granted literature
- US20160254346A1 STRUCTURES TO AVOID FLOATING RESURF LAYER IN HIGH VOLTAGE LATERAL DEVICES Public/Granted day:2016-09-01
Information query
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