Invention Grant
- Patent Title: Method of forming a semiconductor device structure using differing spacer widths and the resulting semiconductor device structure
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Application No.: US15091020Application Date: 2016-04-05
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Publication No.: US09876111B2Publication Date: 2018-01-23
- Inventor: Steffen Sichler , Peter Javorka , Juergen Faul , Sylvain Henri Baudot , Thorsten Kammler
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Priority: DE102015225147 20151214; DE102015225330 20151215
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/06 ; H01L29/417 ; H01L29/66

Abstract:
A method of forming a semiconductor device structure is disclosed including providing a first active region and a second active region in an upper surface portion of a substrate, the first and second active regions being laterally separated by at least one isolation structure, forming a first gate structure comprising a first gate dielectric and a first gate electrode material over the first active region, and a second gate structure comprising a second gate dielectric and a second gate electrode material over the second active region, wherein a thickness of the second gate dielectric is greater than the thickness of the first gate dielectric, and forming a first sidewall spacer structure to the first gate structure and a second sidewall spacer structure to the second gate structure, wherein a lateral thickness of the second sidewall spacer structure is greater than a lateral thickness of the first sidewall spacer structure.
Public/Granted literature
- US20170170317A1 METHOD OF FORMING A SEMICONDUCTOR DEVICE STRUCTURE AND SEMICONDUCTOR DEVICE STRUCTURE Public/Granted day:2017-06-15
Information query
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