Invention Grant
- Patent Title: Compact high speed duty cycle corrector
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Application No.: US15389830Application Date: 2016-12-23
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Publication No.: US09882570B1Publication Date: 2018-01-30
- Inventor: Simon Forey , Rajasekhar Nagulapalli , Parmanand Mishra
- Applicant: INPHI CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INPHI CORPORATION
- Current Assignee: INPHI CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Ogawa P.C.
- Agent Richard T. Ogawa
- Main IPC: H03L7/08
- IPC: H03L7/08 ; H03K5/156 ; H03G3/20 ; H04L27/01

Abstract:
Embodiments of the present invention provide techniques for duty cycle correction of clock signals. An input clock signal passes through a pair of output transistors, which provides an output clock signal based on the input clock signal. A duty cycle sensor generates a first correction signal based on the output clock signal. The first correction signal is at least partially opposite of the output clock signal. A duty cycle corrector generates a second correction signal based on the first correction signal. The duty cycle corrector includes two or more transistors for generating the second correction signal. The second correction signal is applied to the output clock signal. There are other embodiments as well.
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