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公开(公告)号：US10193640B2
公开(公告)日：2019-01-29
申请号：US15995042
申请日：2018-05-31
Applicant: INPHI CORPORATION
Inventor： Simon Forey , Rajasekhar Nagulapalli , Parmanand Mishra , Michael S. Harwood
IPC: H04B17/21 , H04B17/318 , H03K5/19 , H03K3/3565 , H04L12/26
Abstract: The present invention is directed to data communication. According to a specific embodiment, the present invention provides technique for loss of signal detection. A loss-of-signal detection (LOSD) device determines an analog signal indicating signal strength by subtracting a threshold offset voltage from an incoming signal. The analog signal is then processed by a switch network of an output stage circuit, which provides a digital output of loss of signal indication at a low frequency (relative to the incoming signal frequency). There are other embodiments as well.
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公开(公告)号：US10014965B1
公开(公告)日：2018-07-03
申请号：US15343653
申请日：2016-11-04
Applicant: INPHI CORPORATION
Inventor： Simon Forey , Rajasekhar Nagulapalli , Parmanand Mishra , Michael S. Harwood
IPC: H04B17/21 , H04B17/318 , H03K5/19 , H03K3/3565 , H04L12/26
CPC classification number: H04B17/21 , H03K3/3565 , H03K5/19 , H04B17/318
Abstract: The present invention is directed to data communication. According to a specific embodiment, the present invention provides technique for loss of signal detection. A loss-of-signal detection (LOSD) device determines an analog signal indicating signal strength by subtracting a threshold offset voltage from an incoming signal. The analog signal is then processed by a switch network of an output stage circuit, which provides a digital output of loss of signal indication at a low frequency (relative to the incoming signal frequency). There are other embodiments as well.
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公开(公告)号：US10284394B1
公开(公告)日：2019-05-07
申请号：US16101286
申请日：2018-08-10
Applicant: INPHI CORPORATION
Inventor： Simon Forey , Rajasekhar Nagulapalli , Parmanand Mishra
Abstract: The present invention is directed to communication systems and electrical circuits. According to an embodiment, an input termination circuit includes a first attenuation resistor and a second attenuation resistor. The resistance values of these two resistors are adjusted in opposite directions to maintain a stable output impedance. There are other embodiments as well.
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公开(公告)号：US10771065B2
公开(公告)日：2020-09-08
申请号：US16664666
申请日：2019-10-25
Applicant: INPHI CORPORATION
Inventor： Simon Forey , Parmanand Mishra , Michael S. Harwood , Rajasekhar Nagulapalli
IPC: H03L7/08 , H03L7/07 , H03L7/081 , H03L7/099 , H03L7/187 , H03K5/135 , H02M3/07 , H03L7/093 , H04L7/00 , H04L7/033
Abstract: The present invention is directed to electrical circuits. More specifically, embodiments of the present invention provide a charge pump, which can be utilized as a part of a clock data recovery device. Early and late signals are used as differential switching voltage signals in the charge pump. The first switch and a second switch are used for controlling the direction of the current flowing into the loop filter. Input differential voltages to the switches are being generated with an opamp negative feedback loop. The output voltage of the first switch and the second switch is used in conjunction with a resistor to generate a charge pump current. There are other embodiments as well.
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公开(公告)号：US10270409B1
公开(公告)日：2019-04-23
申请号：US15597074
申请日：2017-05-16
Applicant: INPHI CORPORATION
Inventor： Simon Forey , Rajasekhar Nagulapalli , Parmanand Mishra
Abstract: The present invention is directed to electrical circuits and techniques thereof. In various embodiments, the present invention provides a variable gain amplifier architecture that includes a continuous-time linear equalizer (CTLE) section and a variable gain amplifier (VGA) section. The CTLE section provides both a pair of equalized data signals and a common mode voltage. A DAC generates a control signal based on a control code. The VGA section amplifies the pair of equalized data signals by an amplification factor using a transistor whose resistance value is based on both the common mode voltage and the control signal. There are other embodiments as well.
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Patent Agency Ranking
公开(公告)号：US10243570B1
公开(公告)日：2019-03-26
申请号：US15663419
申请日：2017-07-28
Applicant: INPHI CORPORATION
Inventor： Simon Forey , Parmanand Mishra , Michael Harwood , Rajasekhar Nagulapalli
Abstract: The present invention is directed to electrical circuits. More specifically, embodiments of the present invention provide a charge pump, which can be utilized as a part of a clock data recovery device. Early and late signals are used as differential switching voltage signals in the charge pump. The first switch and a second switch are used for controlling the direction of the current flowing into the loop filter. Input differential voltages to the switches are being generated with an opamp negative feedback loop. The output voltage of the first switch and the second switch is used in conjunction with a resistor to generate a charge pump current. There are other embodiments as well.
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公开(公告)号：US10122368B2
公开(公告)日：2018-11-06
申请号：US15840984
申请日：2017-12-13
Applicant: INPHI CORPORATION
Inventor： Simon Forey , Rajasekhar Nagulapalli , Parmanand Mishra
Abstract: Embodiments of the present invention provide techniques for duty cycle correction of clock signals. An input clock signal passes through a pair of output transistors, which provides an output clock signal based on the input clock signal. A duty cycle sensor generates a first correction signal based on the output clock signal. The first correction signal is at least partially opposite of the output clock signal. A duty cycle corrector generates a second correction signal based on the first correction signal. The duty cycle corrector includes two or more transistors for generating the second correction signal. The second correction signal is applied to the output clock signal. There are other embodiments as well.
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公开(公告)号：US10122335B2
公开(公告)日：2018-11-06
申请号：US15811036
申请日：2017-11-13
Applicant: INPHI CORPORATION
Inventor： Rajasekhar Nagulapalli , Simon Forey , Parmanand Mishra
Abstract: The present invention is directed to electrical circuits and techniques thereof. More specifically, an embodiment of the present invention provides a line driver with transistors directly coupled to the ground, and a bias voltage is coupled common mode resistors of the line driver. There are other embodiments as well.
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公开(公告)号：US10804797B1
公开(公告)日：2020-10-13
申请号：US16284633
申请日：2019-02-25
Applicant: INPHI CORPORATION
Inventor： Rajasekhar Nagulapalli , Simon Forey , Parmanand Mishra
Abstract: The present invention is directed to electrical circuits. According to an embodiment, the present invention provides a charge pump circuit with a bias section and a switch section. The switch section includes a first switch coupled to an early signal and a second switch coupled to a late signal. The charge pump additionally includes a low-pass filter. The switch section includes a first resistor and a second resistor. The first resistor is directly coupled to the first switch and the low-pass filter. The second resistor is directly coupled to the second switch and the first resistor. There are other embodiments as well.
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公开(公告)号：US10764092B2
公开(公告)日：2020-09-01
申请号：US16681525
申请日：2019-11-12
Applicant: INPHI CORPORATION
Inventor： Simon Forey , Rajasekhar Nagulapalli , Parmanand Mishra
Abstract: The present invention is directed to communication systems and electrical circuits. According to an embodiment, an input termination circuit includes a first attenuation resistor and a second attenuation resistor. The resistance values of these two resistors are adjusted in opposite directions to maintain a stable output impedance. There are other embodiments as well.
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