Invention Grant
- Patent Title: Single command, multiple column-operation memory device
-
Application No.: US15497126Application Date: 2017-04-25
-
Publication No.: US09898400B2Publication Date: 2018-02-20
- Inventor: Thomas A. Sheffler , Lawrence Lai , Liang Peng , Bohuslav Rychlik
- Applicant: Rambus Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA Sunnyvale
- Agent Charles Shemwell
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F13/00 ; G06F13/28 ; G06F12/02 ; G11C7/10 ; G11C7/22 ; G11C8/10

Abstract:
A memory access command, column address and plurality of write data values are received within an integrated-circuit memory chip via external signaling links. In response to the memory access command, the integrated-circuit memory chip (i) decodes the column address to select address-specified sense amplifiers from among a plurality of sense amplifiers that constitute a sense amplifier bank, (ii) reads first data, constituted by a plurality of read data values, out of the address-specified sense amplifiers, and (iii) overwrites the first data within the address-specified sense amplifiers with second data constituted by one or more of the write data values and by one or more of the read data values.
Public/Granted literature
- US20170293552A1 SINGLE COMMAND, MULTIPLE COLUMN-OPERATION MEMORY DEVICE Public/Granted day:2017-10-12
Information query