Invention Grant
- Patent Title: Forming array contacts in semiconductor memories
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Application No.: US15471420Application Date: 2017-03-28
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Publication No.: US09899254B2Publication Date: 2018-02-20
- Inventor: Roberto Somaschini , Alessandro Vaccaro , Paolo Tessariol , Giulio Albini
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L27/105

Abstract:
Array contacts for semiconductor memories may be formed using a first set of parallel stripe masks and subsequently a second set of parallel stripe masks transverse to the first set. For example, one set of masks may be utilized to etch a dielectric layer, to form parallel spaced trenches. Then the trenches may be filled with a sacrificial material. That sacrificial material may then be masked transversely to its length and etched, for example. The resulting openings may be filled with a metal to form array contacts.
Public/Granted literature
- US20170200635A1 FORMING ARRAY CONTACTS IN SEMICONDUCTOR MEMORIES Public/Granted day:2017-07-13
Information query
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