- 专利标题： Asymmetrical emphasis in a memory data bus driver
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申请号： US15480616申请日： 2017-04-06
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公开(公告)号： US09905287B2公开(公告)日： 2018-02-27
- 发明人: Yanbo Wang , Praveen Rajan Singh , Yue Yu , Craig DeSimone
- 申请人： Integrated Device Technology, Inc.
- 申请人地址： US CA San Jose
- 专利权人： INTEGRATED DEVICE TECHNOLOGY, INC.
- 当前专利权人： INTEGRATED DEVICE TECHNOLOGY, INC.
- 当前专利权人地址： US CA San Jose
- 代理机构： Christopher P. Maiorana, PC
- 主分类号： G11C11/4093
- IPC分类号： G11C11/4093 ; G06F13/40 ; G11C11/4076 ; H04L25/02
摘要：
An apparatus includes an interface and a circuit. The interface may be configured to generate a read signal that carries read data from a memory channel. The circuit may be configured to (i) modify the read signal with a de-emphasis on each pull up of the read signal and a pre-emphasis on each pull down of the read signal and (ii) transfer the read signal as modified to a memory controller.
公开/授权文献
- US20170212847A1 ASYMMETRICAL EMPHASIS IN A MEMORY DATA BUS DRIVER 公开/授权日：2017-07-27
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