- 专利标题: Pattern selection for full-chip source and mask optimization
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申请号: US14874134申请日: 2015-10-02
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公开(公告)号: US09934350B2公开(公告)日: 2018-04-03
- 发明人: Hua-Yu Liu
- 申请人: ASML NETHERLANDS B.V.
- 申请人地址: NL Veldhoven
- 专利权人: ASML NETHERLANDS B.V.
- 当前专利权人: ASML NETHERLANDS B.V.
- 当前专利权人地址: NL Veldhoven
- 代理机构: Pillsbury Winthrop Shaw Pittman LLP
- 主分类号: G06F17/50
- IPC分类号: G06F17/50 ; G03F1/00 ; G03F1/36 ; G03F7/20
摘要:
The present invention relates to lithographic apparatuses and processes, and more particularly to tools for co-optimizing illumination sources and masks for use in lithographic apparatuses and processes. According to certain aspects, the present invention enables full chip pattern coverage while lowering the computation cost by intelligently selecting a small set of critical design patterns from the full set of clips to be used in source and mask optimization. Optimization is performed only on these selected patterns to obtain an optimized source. The optimized source is then used to optimize the mask (e.g. using OPC and manufacturability verification) for the full chip, and the process window performance results are compared. If the results are comparable to conventional full-chip SMO, the process ends, otherwise various methods are provided for iteratively converging on the successful result.
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