- Patent Title: Exploiting frame to frame coherency in a sort-middle architecture
-
Application No.: US14277239Application Date: 2014-05-14
-
Publication No.: US09940686B2Publication Date: 2018-04-10
- Inventor: Juan Fernandez , Javier Carretero Casado , Pedro Marcuello , Tomas G. Akenine-Moller
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop Pruner & Hu, P.C.
- Main IPC: G06T1/60
- IPC: G06T1/60 ; G06T1/20 ; G09G5/36 ; G06T15/00 ; G06T17/10

Abstract:
Pixel values that were computed in a previous frame may be reused for the current frame, operating in a sort-middle architecture. A hash or some other compact representation of all the data used in a tile, including all triangles, uniforms, textures, shaders, etc. is computed and stored for each tile. When rendering the next frame, that compact representation is once again computed for each tile. In a sort-middle architecture, there is a natural break point just before rasterization. At this break point, the compact representation may be compared to the compact representation computed in the previous frame for the same tile. If those compact representations are the same, then there is no need to render anything for this tile. Instead, the contents of the color buffer or other buffers of the previous frame of the tile may be moved to the same buffer of the tile for the current frame.
Public/Granted literature
- US20150332429A1 Exploiting Frame to Frame Coherency in a Sort-Middle Architecture Public/Granted day:2015-11-19
Information query