A timing error detection circuit for calibrating a serial transmitter is disclosed. The circuit includes a data source configured to provide data for serial transmission and a clock source configured to produce N versions of a sampling clock that are at N different phases of the sampling clock. The detection circuit has a first sampler configured to sample the data source by using a first phase of the sampling clock to generate a first sampled signal and a second sampler configured to sample the data source by using a second phase of the sampling clock to generate a second sampled signal. The detection circuit also includes a first comparator configured to compare the first and second sampled signals to generate a difference signal and a first low-pass filter configured to filter the difference signal to generate an average difference voltage. A second comparator in the detection circuit is configured to compare the average difference voltage with a reference voltage.