Invention Grant
- Patent Title: Accelerated address indirection table lookup for wear-leveled non-volatile memory
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Application No.: US14752554Application Date: 2015-06-26
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Publication No.: US09952801B2Publication Date: 2018-04-24
- Inventor: Raj K. Ramanujan , Jun Zhu , Mohamed Arafa , Woojong Han , Jordan A. Horwich
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law PC
- Main IPC: G06F12/02
- IPC: G06F12/02 ; G06F3/06 ; G06F12/1027 ; G06F12/1009 ; G06F12/0866

Abstract:
Embodiments are generally directed to accelerated address indirection table lookup for wear-leveled non-volatile memory. A embodiment of a memory device includes nonvolatile memory; a memory controller; and address indirection logic to provide address indirection for the nonvolatile memory, of the address indirection logic to maintain an address indirection table (AIT) in the nonvolatile memory, the AIT including a plurality of levels, and copy at least a portion of the AIT to a second memory, the second memory having less latency than the first memory.
Public/Granted literature
- US20160378396A1 ACCELERATED ADDRESS INDIRECTION TABLE LOOKUP FOR WEAR-LEVELED NON-VOLATILE MEMORY Public/Granted day:2016-12-29
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