Invention Grant
- Patent Title: Integrated bi-layer STI deposition
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Application No.: US15257417Application Date: 2016-09-06
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Publication No.: US09960074B2Publication Date: 2018-05-01
- Inventor: Tsung Han Hsu , Kuan-Cheng Wang , Han-Ti Hsiaw , Shin-Yeu Tsai
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L21/306 ; H01L21/324 ; H01L21/02 ; H01L29/66 ; H01L29/06 ; H01L29/78

Abstract:
A method includes etching a semiconductor substrate to form trenches extending into the semiconductor substrate, and depositing a first dielectric layer into the trenches. The first dielectric layer fills lower portions of the trenches. A Ultra-Violet (UV) treatment is performed on the first dielectric layer in an oxygen-containing process gas. The method further includes depositing a second dielectric layer into the trenches. The second dielectric layer fills upper portions of the trenches. A thermal treatment is performed on the second dielectric layer in an additional oxygen-containing process gas. After the thermal treatment, an anneal is performed on the first dielectric layer and the second dielectric layer.
Public/Granted literature
- US20180005870A1 Integrated Bi-Layer STI Deposition Public/Granted day:2018-01-04
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