Invention Grant
- Patent Title: Multilayer wiring substrate, manufacturing method therefor, and substrate for probe card
-
Application No.: US14919058Application Date: 2015-10-21
-
Publication No.: US09961768B2Publication Date: 2018-05-01
- Inventor: Yoshihito Otsubo , Toru Meguro , Tatsunori Kan
- Applicant: Murata Manufacturing Co., Ltd.
- Applicant Address: JP Kyoto
- Assignee: MURATA MANUFACTURING CO., LTD.
- Current Assignee: MURATA MANUFACTURING CO., LTD.
- Current Assignee Address: JP Kyoto
- Agency: Pearne and Gordon LLP
- Priority: JP2013-094080 20130426
- Main IPC: H05K1/00
- IPC: H05K1/00 ; H05K1/09 ; H05K1/11 ; H05K3/40 ; H05K3/46 ; H05K1/02 ; H05K3/00 ; H05K3/42 ; H01L23/498 ; H01L21/48 ; H05K3/34

Abstract:
A multilayer wiring substrate that can realize a higher-density wiring structure is obtained. Provided is a multilayer wiring substrate, where a multilayer body including a first insulating layer and a second insulating layer stacked on the bottom surface of the first insulating layer includes printed wiring electrodes; the printed wiring electrodes are formed by printing with and sintering conductive paste; the printed wiring electrodes respectively include first wiring electrode portions located on the second insulating layer and second wiring electrode portions respectively joined to first wiring electrode portions; and the second wiring electrode portions respectively extend into through holes and, further, are exposed at the top surface of the first insulating layer.
Public/Granted literature
- US20160044782A1 MULTILAYER WIRING SUBSTRATE, MANUFACTURING METHOD THEREFOR, AND SUBSTRATE FOR PROBE CARD Public/Granted day:2016-02-11
Information query