Invention Grant
- Patent Title: Split-gate, twin-bit non-volatile memory cell
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Application No.: US15476663Application Date: 2017-03-31
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Publication No.: US09972632B2Publication Date: 2018-05-15
- Inventor: Chunming Wang , Nhan Do
- Applicant: Silicon Storage Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: DLA Piper LLP (US)
- Priority: CN201610285454 20160429
- Main IPC: H01L27/11521
- IPC: H01L27/11521 ; H01L29/423 ; G11C16/10 ; G11C16/16
Abstract:
A memory device that includes a substrate of semiconductor material of a first conductivity type, first and second regions spaced apart in the substrate and having a second conductivity type different than the first conductivity type, with a continuous channel region in the substrate extending between the first and second regions. A first floating gate is disposed over and insulated from a first portion of the channel region adjacent to the first region. A second floating gate is disposed over and insulated from a second portion of the channel region adjacent to the second region. A word line gate is disposed over and insulated from a third portion of the channel region between the first and second channel region portions. A first erase gate disposed over and insulated from the first region. A second erase gate disposed is over and insulated from the second region.
Public/Granted literature
- US20170317093A1 Split-Gate, Twin-Bit Non-volatile Memory Cell Public/Granted day:2017-11-02
Information query
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