Invention Grant
- Patent Title: Termination schemes for multi-rank memory bus architectures
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Application No.: US15368445Application Date: 2016-12-02
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Publication No.: US09984011B2Publication Date: 2018-05-29
- Inventor: Tin Tin Wee , Thomas Bryan
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Haynes and Boone, LLP
- Main IPC: G06F13/16
- IPC: G06F13/16 ; G11C11/401 ; G06F9/445 ; G06F13/40 ; G06F13/42
Abstract:
A multi-rank memory bus architecture is provided in which an active DRAM is unterminated and an inactive DRAM terminates to increase the data eye width at the active DRAM.
Public/Granted literature
- US20170351625A1 TERMINATION SCHEMES FOR MULTI-RANK MEMORY BUS ARCHITECTURES Public/Granted day:2017-12-07
Information query
