Invention Grant
- Patent Title: Memory circuit with assist circuit trimming
-
Application No.: US15621118Application Date: 2017-06-13
-
Publication No.: US09984765B2Publication Date: 2018-05-29
- Inventor: Atul Katoch
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Main IPC: G11C17/00
- IPC: G11C17/00 ; G11C29/02 ; G11C29/00 ; G11C11/417 ; G11C17/18 ; G11C17/16

Abstract:
A method includes: examining, by a test engine, whether a first bit of a memory array is functional; in response to the first bit being not functional, storing, by the test engine, address information of the first bit into a memory device; and retrieving, by an assist circuit trimming (ACT) circuit, the address information of the first bit from the memory device to selectively activate at least a first one of a plurality of assist circuits associated with the first bit.
Public/Granted literature
- US20180102181A1 MEMORY CIRCUIT WITH ASSIST CIRCUIT TRIMMING Public/Granted day:2018-04-12
Information query