Invention Application
WO9959190A3 PROCESS AND MANUFACTURING TOOL ARCHITECTURE FOR USE IN THE MANUFACTURE OF ONE OR MORE METALLIZATION LEVELS ON A WORKPIECE
审中-公开
在制造一个或多个金属化水平的工作中使用的工艺和制造工具结构
- Patent Title: PROCESS AND MANUFACTURING TOOL ARCHITECTURE FOR USE IN THE MANUFACTURE OF ONE OR MORE METALLIZATION LEVELS ON A WORKPIECE
- Patent Title (中): 在制造一个或多个金属化水平的工作中使用的工艺和制造工具结构
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Application No.: PCT/US9910331Application Date: 1999-05-12
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Publication No.: WO9959190A3Publication Date: 2000-04-06
- Inventor: STEVENS E HENRY , BERNER ROBERT W
- Applicant: SEMITOOL INC
- Assignee: SEMITOOL INC
- Current Assignee: SEMITOOL INC
- Priority: US7656598 1998-05-12; US7669598 1998-05-12; US12823898 1998-08-03
- Main IPC: H01L21/302
- IPC: H01L21/302 ; C12N15/31 ; H01L21/304 ; H01L21/306 ; H01L21/3065 ; H01L21/3213 ; H01L21/768 ; H01L37/00 ; H01L21/00 ; B23K9/00 ; C23C16/00 ; H01L21/22 ; H01L21/465 ; H01L21/48 ; H01L37/32
Abstract:
A semiconductor manufacturing tool configuration and corresponding process for applying one or more levels of interconnect metallization to a generally planar dielectric surface of a semiconductor workpiece with a minimal number of workpiece transfer operations between the tool sets is disclosed.
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