Invention Application
WO0115171A3 FLASH MEMORY ARCHITECTURE EMPLOYING THREE LAYER METAL INTERCONNECT 审中-公开
使用三层金属互连的闪存存储器架构

FLASH MEMORY ARCHITECTURE EMPLOYING THREE LAYER METAL INTERCONNECT
Abstract:
The present invention discloses a memory wordline decoder that includes plurality of pre-decoded address lines that are electrically connected with a global x-decoder. A sub x-decoder is electrically connected with the global x-decoder for receiving electrical control signals from the global x-decoder. A memory sector is electrically connected with the sub x-decoder. The global x-decoder selectively controls the sub x-decoder to select a plurality of wordlines in the memory sector. A vertical x-decoder is electrically connected with the global x-decoder and the sub x-decoder. The vertical x-decoder is used to select a predetermined wordline by the global x-decoder during operation.
Patent Agency Ranking
0/0