A magnetoresistive random access memory architecture (10) free of isolation devices includes a plurality of data columns of non-volatile magnetoresistive elements. A reference column (12) includes non-volatile magnetoresistive elements positioned adjacent to the data column. Each column is connected to a current conveyor (16-20). A selected data current conveyor and the reference current conveyor (20) are connected to inputs of a differential amplifier (65-68) for differentially comparing a data voltage to a reference voltage. The current conveyors are connected directly to the ends of the data and reference bitlines. This specific arrangement allows the current conveyors to be clamped to the same voltage which reduces or removes sneak circuits to substantially reduce leakage currents.