Abstract:
A method of fabricating a magnetoresistive random access memory device (10) comprising the steps of providing a substrate (11), forming a first conductive layer positioned on the substrate (16), forming a conductive material stack region with a flat surface, the conductive material stack region being positioned on a portion of the first conductive layer, and forming a magnetoresistive random access memory device (27) positioned on the flat surface of the conductive material stack region, the magnetoresistive random access memory device being isolated from the first conductive layer and subsequent layers grown thereon.
Abstract:
A shielded electronic integrated circuit apparatus (7) comprising a substrate (10) with an electronic integrated circuit (14) formed thereon, a dielectric region (12) positioned on the substrate and the electronic integrated circuit wherein the dielectric region and the substrate are substantially surrounded by a magnetic material region (26, 30,32,34) deposited using electrochemical deposition and wherein the electronic integrated circuit is shielded from electromagnetic radiation.
Abstract:
A magnetoresistive random access memory architecture (10) free of isolation devices includes a plurality of data columns of non-volatile magnetoresistive elements. A reference column (12) includes non-volatile magnetoresistive elements positioned adjacent to the data column. Each column is connected to a current conveyor (16-20). A selected data current conveyor and the reference current conveyor (20) are connected to inputs of a differential amplifier (65-68) for differentially comparing a data voltage to a reference voltage. The current conveyors are connected directly to the ends of the data and reference bitlines. This specific arrangement allows the current conveyors to be clamped to the same voltage which reduces or removes sneak circuits to substantially reduce leakage currents.
Abstract:
A method for fabricating a flux concentrating system (62) for use in a magnetoelectronics device is provided. The method comprises the steps of providing a bit line (10) formed in a substrate (12) and forming a first material layer (24) overlying the bit line (10) and the substrate (12). Etching is performed to form a trench (52) in the first material layer (24) and a cladding layer (56) is deposited in the trench (52). A buffer material layer (58) is formed overlying the cladding layer (56) and a portion of the buffer material layer (58) and a portion of the cladding layer (56) is removed.