Invention Application
- Patent Title: HIGHLY EFFICIENT SEGMENTED WORD LINE MRAM ARRAY
- Patent Title (中): 高效的边界线MRAM ARRAY
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Application No.: PCT/US2006/010752Application Date: 2006-03-24
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Publication No.: WO2006104876A2Publication Date: 2006-10-05
- Inventor: YANG, Hsu, Kai , WANG, Po-kang , SHI, Xizeng
- Applicant: HEADWAY TECHNOLOGIES, INC. , APPLIED SPINTRONICS, INC. , YANG, Hsu, Kai , WANG, Po-kang , SHI, Xizeng
- Applicant Address: 678 S. Hillview Drive, Milpitas, CA 95035 US
- Assignee: HEADWAY TECHNOLOGIES, INC.,APPLIED SPINTRONICS, INC.,YANG, Hsu, Kai,WANG, Po-kang,SHI, Xizeng
- Current Assignee: HEADWAY TECHNOLOGIES, INC.,APPLIED SPINTRONICS, INC.,YANG, Hsu, Kai,WANG, Po-kang,SHI, Xizeng
- Current Assignee Address: 678 S. Hillview Drive, Milpitas, CA 95035 US
- Agency: SAILE, George, O. et al.
- Priority: US11/093,613 20050330
- Main IPC: G11C11/00
- IPC: G11C11/00
Abstract:
In an MRAM array based on MTJs, the size of segmented word line select transistors and their associated connections become a significant overhead, espe¬ cially when the operating point is chosen deep along the hard axis of the asteroid curve. This problem has been overcome by placing the big segmented word line select transistors under the MTJ array and reducing the overall MRAM cell array down to a level comparable to a simple Cross Point MRAM array.
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