Invention Application
WO2010022969A1 USING A CAP LAYER IN METALLIZATION SYSTEMS OF SEMICONDUCTOR DEVICES AS A CMP AND ETCH STOP LAYER
审中-公开
在作为CMP和蚀刻停止层的半导体器件的金属化系统中使用CAP层
- Patent Title: USING A CAP LAYER IN METALLIZATION SYSTEMS OF SEMICONDUCTOR DEVICES AS A CMP AND ETCH STOP LAYER
- Patent Title (中): 在作为CMP和蚀刻停止层的半导体器件的金属化系统中使用CAP层
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Application No.: PCT/EP2009/006257Application Date: 2009-08-28
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Publication No.: WO2010022969A1Publication Date: 2010-03-04
- Inventor: WERNER, Thomas , FROHBERG, Kai , FEUSTEL, Frank
- Applicant: ADVANCED MICRO DEVICES, INC. , WERNER, Thomas , FROHBERG, Kai , FEUSTEL, Frank
- Applicant Address: One AMD Place Mail Stop 68 Sunnyvale, CA 94088-3453 US
- Assignee: ADVANCED MICRO DEVICES, INC.,WERNER, Thomas,FROHBERG, Kai,FEUSTEL, Frank
- Current Assignee: ADVANCED MICRO DEVICES, INC.,WERNER, Thomas,FROHBERG, Kai,FEUSTEL, Frank
- Current Assignee Address: One AMD Place Mail Stop 68 Sunnyvale, CA 94088-3453 US
- Agency: PFAU, Anton, K.
- Priority: DE10 20080829; US12/483,571 20090612
- Main IPC: H01L21/321
- IPC: H01L21/321 ; H01L21/768
Abstract:
During the manufacturing of advanced metallization systems, a dielectric cap layer formed on a sensitive dielectric material may be partially maintained during a CMP process for removing excess metal, thereby avoiding the necessity for depositing a dedicated etch stop material, as may be required in conventional approaches when substantially completely consuming the dielectric cap material during the CMP process. Hence, reduced process complexity and/or enhanced flexibility may be accomplished in combination with increased integrity of the low-k dielectric material.
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