Invention Application
WO2014105135A1 INSTRUCTIONS PROCESSORS, METHODS, AND SYSTEMS TO PROCESS SECURE HASH ALGORITHMS
审中-公开
指令处理器,方法和系统来处理安全的哈希算法
- Patent Title: INSTRUCTIONS PROCESSORS, METHODS, AND SYSTEMS TO PROCESS SECURE HASH ALGORITHMS
- Patent Title (中): 指令处理器,方法和系统来处理安全的哈希算法
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Application No.: PCT/US2013/046410Application Date: 2013-06-18
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Publication No.: WO2014105135A1Publication Date: 2014-07-03
- Inventor: WOLRICH, Gilbert M. , YAP, Kirk S. , GOPAL, Vinodh , GUILFORD, James D.
- Applicant: INTEL CORPORATION , WOLRICH, Gilbert M. , YAP, Kirk S. , GOPAL, Vinodh , GUILFORD, James D.
- Applicant Address: 2200 Mission College Boulevard M/S: RNB-4-150 Santa Clara, California 95054 US
- Assignee: INTEL CORPORATION,WOLRICH, Gilbert M.,YAP, Kirk S.,GOPAL, Vinodh,GUILFORD, James D.
- Current Assignee: INTEL CORPORATION,WOLRICH, Gilbert M.,YAP, Kirk S.,GOPAL, Vinodh,GUILFORD, James D.
- Current Assignee Address: 2200 Mission College Boulevard M/S: RNB-4-150 Santa Clara, California 95054 US
- Agency: MALLIE, Michael J. et al.
- Priority: US13/729,502 20121228
- Main IPC: G06F21/00
- IPC: G06F21/00
Abstract:
A method of an aspect includes receiving an instruction. The instruction indicates a first source of a first packed data including state data elements a i , b i , e i , and f i for a current round (i) of a secure hash algorithm 2 (SHA2) hash algorithm. The instruction indicates a second source of a second packed data. The first packed data has a width in bits that is less than a combined width in bits of eight state data elements a i , b i , c i , d i , e i , f i , g i , h i of the SHA2 hash algorithm. The method also includes storing a result in a destination indicated by the instruction in response to the instruction. The result includes updated state data elements a i+ , b i+ , e i+ , and f i+ that have been updated from the corresponding state data elements a i , b i , e i , and f i by at least one round of the SHA2 hash algorithm.
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