Invention Application
- Patent Title: PATTERNED GROUNDS AND METHODS OF FORMING THE SAME
- Patent Title (中): 图案化方法及其形成方法
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Application No.: PCT/US2015047953Application Date: 2015-09-01
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Publication No.: WO2016036744A3Publication Date: 2016-06-09
- Inventor: JOW UEI-MING , SONG YOUNG KYU , YOON JUNG HO , LEE JONG-HOON , ZHANG XIAONAN
- Applicant: QUALCOMM INC
- Assignee: QUALCOMM INC
- Current Assignee: QUALCOMM INC
- Priority: US201414474860 2014-09-02
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01F27/28 ; H01L23/495 ; H01L23/50 ; H01L23/522 ; H01L23/64 ; H01L49/02
Abstract:
A semiconductor package according to some examples of the disclosure may include a first body layer (250), a transformer (220) that may comprise one or more inductors, coupled inductors, or inductive elements positioned above the first body layer. A first ground plane (260) is on a top of the first body layer (250) between the first body layer and the inductive element (220). The first ground plane may have conductive lines generally perpendicular to a magnetic field generated by the inductive element, and a second ground plane (270) on a bottom of the first body layer opposite the first ground plane. The first and second ground planes may also provide heat dissipation elements (280) for the semiconductor as well as reduce or eliminate eddy current and parasitic effects produced by the inductive element.
Information query
IPC分类: