Invention Application
- Patent Title: METHODS FOR DEPOSITING DIELECTRIC BARRIER LAYERS AND ALUMINUM CONTAINING ETCH STOP LAYERS
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Application No.: PCT/US2016/055317Application Date: 2016-10-04
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Publication No.: WO2017062355A3Publication Date: 2017-04-13
- Inventor: KESAPRAGADA, Sree Rangasai V. , MORAES, Kevin , GUGGILLA, Srinivas , REN, He , NAIK, Mehul , THOMPSON, David , YE, Weifeng , CHENG, Yana , CAO, Yong , TANG, Xianmin , MA, Paul F. , PADHI, Deenesh
- Applicant: APPLIED MATERIALS, INC.
- Applicant Address: 3050 Bowers Avenue Santa Clara, California 95054 US
- Assignee: APPLIED MATERIALS, INC.
- Current Assignee: APPLIED MATERIALS, INC.
- Current Assignee Address: 3050 Bowers Avenue Santa Clara, California 95054 US
- Agency: TABOADA, Alan et al.
- Priority: US62/236,953 20151004
- Main IPC: H01L21/768
- IPC: H01L21/768
Abstract:
In some embodiments, a method of forming an interconnect structure includes selectively depositing a barrier layer atop a substrate having one or more exposed metal surfaces and one or more exposed dielectric surfaces, wherein a thickness of the barrier layer atop the one or more exposed metal surfaces is greater than the thickness of the barrier layer atop the one or more exposed dielectric surfaces. In some embodiments, a method of forming an interconnect structure includes depositing an etch stop layer comprising aluminum atop a substrate via a physical vapor deposition process; and depositing a barrier layer atop the etch stop layer via a chemical vapor deposition process, wherein the substrate is transferred from a physical vapor deposition chamber after depositing the etch stop layer to a chemical vapor deposition chamber without exposing the substrate to atmosphere.
Public/Granted literature
- WO2017062355A2 METHODS FOR DEPOSITING DIELECTRIC BARRIER LAYERS AND ALUMINUM CONTAINING ETCH STOP LAYERS Public/Granted day:2017-04-13
Information query
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