公开(公告)号：WO2022240704A1

公开(公告)日：2022-11-17

申请号：PCT/US2022/028222

申请日：2022-05-07

Applicant: APPLIED MATERIALS, INC.

Inventor： LI, Rui ,  XIE, Xiangjin ,  TANG, Xianmin ,  CHAN, Anthony Chih-Tung

IPC: H01J37/32 ,  H01L21/02 ,  C23C16/4554 ,  H01J37/32174 ,  H01L21/0228 ,  H01L21/0234 ,  H01L21/3105 ,  H01L21/67 ,  H01L21/76888

Abstract: Methods and apparatus for forming a barrier layer are provided herein. In some embodiments, a method of forming a barrier layer on a substrate includes treating an exposed layer deposited on a substrate and within a feature of the substrate by pulsing a bias power applied to a substrate support supporting the substrate while exposing the layer to a plasma. The exposed layer can be deposited by an atomic layer deposition process, and can be, for example, a tantalum nitride layer. The bias power can be up to 500 watts of RF power at a pulse frequency of about 1 Hz to about 10 kHz. The bias power can be pulsed uniformly or at multiple different levels.

公开(公告)号：WO2021080701A1

公开(公告)日：2021-04-29

申请号：PCT/US2020/050048

申请日：2020-09-10

Applicant: APPLIED MATERIALS, INC.

Inventor： YANG, Zihao ,  ZHU, Mingwei ,  PATIBANDLA, Nag B. ,  CAO, Yong ,  ZHANG, Shumao ,  CHEN, Zhebo ,  LU, Jean ,  DIEHL, Daniel Lee ,  TANG, Xianmin

IPC: C23C14/34 ,  C23C14/54 ,  C23C14/16

Abstract: Embodiments described herein include a method for depositing a material layer on a substrate while controlling a bow of the substrate and a surface roughness of the material layer. A bias applied to the substrate while the material layer is deposited is adjusted to control the bow of the substrate. A bombardment process is performed on the material layer to improve the surface roughness of the material layer. The bias and bombardment process improve a uniformity of the material layer and reduce an occurrence of the material layer cracking due to the bow of the substrate.

公开(公告)号：WO2019226535A1

公开(公告)日：2019-11-28

申请号：PCT/US2019/033093

申请日：2019-05-20

Applicant: APPLIED MATERIALS, INC.

Inventor： MEBARKI, Bencherki ,  LEE, Joung Joo ,  HOUSHMAND, Farzad ,  SUBRAMANI, Anantha ,  MILLER, Keith ,  TANG, Xianmin ,  KOTHNUR, Prashanth

IPC: H01J37/34 ,  C23C14/56 ,  C23C14/35

Abstract: Multi-zone collimators and process chambers including multi-zone collimators for use with a multi-zone magnetron source are provided herein. In some embodiments, a multi-zone collimator for use with a multi-zone magnetron source, comprising a first collimator plate, a second collimator plate, wherein a first collimator zone having a first width is formed between the first collimator plate and the second collimator plate; and a third collimator plate, wherein a second collimator zone having a second width is formed between the second first collimator plate and the third collimator plate, wherein a length of each of the first, second and third collimator plates are different from each other.

公开(公告)号：WO2019213338A1

公开(公告)日：2019-11-07

申请号：PCT/US2019/030305

申请日：2019-05-02

Applicant: APPLIED MATERIALS, INC.

Inventor： LEI, Yu ,  LEE, Sang-Hyeob ,  PABELICO, Chris ,  XU, Yi ,  HA, Tae Hong ,  TANG, Xianmin ,  PARK, Jin Hee

IPC: C23C16/04 ,  C23C16/06 ,  C23C16/14 ,  C23C16/455 ,  C23C16/56 ,  C23C16/448 ,  C23C28/00 ,  H01L21/285 ,  H01L21/768

Abstract: Apparatuses and methods to provide electronic devices having metal films are provided. Some embodiments of the disclosure utilize a metallic tungsten layer as a liner that is filled with a metal film comprising cobalt. The metallic tungsten layer has good adhesion to the cobalt leading to enhanced cobalt gap-fill performance.

公开(公告)号：WO2018094000A1

公开(公告)日：2018-05-24

申请号：PCT/US2017/061946

申请日：2017-11-16

Applicant: APPLIED MATERIALS, INC.

Inventor： ZENG, Weimin ,  CAO, Yong ,  DIEHL, Daniel Lee ,  DAI, Huixiong ,  PHAN, Khoi ,  NGAI, Christopher ,  WANG, Rongjun ,  TANG, Xianmin

IPC: H01L21/02 ,  H01L21/3205

CPC classification number: C23C14/35 ,  C23C14/0057 ,  C23C14/042 ,  C23C14/06 ,  C23C14/14 ,  C23C14/228 ,  C23C14/54 ,  H01J37/34 ,  H01J2237/332

Abstract: In some embodiments, a method of processing a substrate disposed atop a substrate support in a physical vapor deposition process chamber includes: (a) forming a plasma from a process gas within a processing region of the physical vapor deposition chamber, wherein the process gas comprises an inert gas and a hydrogen-containing gas to sputter silicon from a surface of a target within the processing region of the physical vapor deposition chamber; and (b) depositing an amorphous silicon layer atop a first layer on the substrate, wherein adjusting the flow rate of the hydrogen containing gas tunes the optical properties of the deposited amorphous silicon layer.

公开(公告)号：WO2018067464A1

公开(公告)日：2018-04-12

申请号：PCT/US2017/054766

申请日：2017-10-02

Applicant: APPLIED MATERIALS, INC.

Inventor： RAMALINGAM, Jothilingam ,  MARSHALL, Ross ,  LEI, Jianxin ,  TANG, Xianmin

IPC: H01L21/285 ,  H01L21/324 ,  H01L21/02

Abstract: Ruthenium containing gate stacks and methods of forming ruthenium containing gate stacks are described. The ruthenium containing gate stack comprises a polysilicon layer on a substrate; a silicide layer on the polysilicon layer; a barrier layer on the silicide layer; a ruthenium layer on the barrier layer; and a spacer layer comprising a nitride on sides of the ruthenium layer, wherein the ruthenium layer comprises substantially no ruthenium nitride after formation of the spacer layer. Forming the ruthenium layer comprises sputtering the ruthenium in a krypton environment on a high current electrostatic chuck comprising a high resistivity ceramic material. The sputtered ruthenium layer is annealed at a temperature greater than or equal to about 500 °C.

Abstract translation: 描述了含钌栅极叠层和形成含钌栅极叠层的方法。 包含钌的栅极叠层包括在衬底上的多晶硅层; 在多晶硅层上的硅化物层; 硅化物层上的阻挡层; 在阻挡层上的钌层; 以及在所述钌层的侧面上包含氮化物的间隔层，其中在形成所述间隔层之后，所述钌层基本上不包含氮化钌。 形成钌层包括在包含高电阻率陶瓷材料的高电流静电卡盘上的氪环境中溅射钌。 溅射的钌层在大于或等于约500℃的温度下退火。

公开(公告)号：WO2017062355A2

公开(公告)日：2017-04-13

申请号：PCT/US2016/055317

申请日：2016-10-04

Applicant: APPLIED MATERIALS, INC.

Inventor： KESAPRAGADA, Sree Rangasai V. ,  MORAES, Kevin ,  GUGGILLA, Srinivas ,  REN, He ,  NAIK, Mehul ,  THOMPSON, David ,  YE, Weifeng ,  CHENG, Yana ,  CAO, Yong ,  TANG, Xianmin ,  MA, Paul F. ,  PADHI, Deenesh

IPC: H01L21/768

CPC classification number: H01L21/76832 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/02178 ,  H01L21/02211 ,  H01L21/02219 ,  H01L21/02266 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/3105 ,  H01L21/32 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76834

Abstract: In some embodiments, a method of forming an interconnect structure includes selectively depositing a barrier layer atop a substrate having one or more exposed metal surfaces and one or more exposed dielectric surfaces, wherein a thickness of the barrier layer atop the one or more exposed metal surfaces is greater than the thickness of the barrier layer atop the one or more exposed dielectric surfaces. In some embodiments, a method of forming an interconnect structure includes depositing an etch stop layer comprising aluminum atop a substrate via a physical vapor deposition process; and depositing a barrier layer atop the etch stop layer via a chemical vapor deposition process, wherein the substrate is transferred from a physical vapor deposition chamber after depositing the etch stop layer to a chemical vapor deposition chamber without exposing the substrate to atmosphere.

Abstract translation: 在一些实施例中，形成互连结构的方法包括在具有一个或多个暴露的金属表面和一个或多个暴露的电介质表面的衬底上选择性地沉积阻挡层，其中阻挡层的厚度在一个或多个暴露的金属表面 大于在一个或多个暴露的电介质表面上方的阻挡层的厚度。 在一些实施例中，形成互连结构的方法包括通过物理气相沉积工艺沉积包含在基板顶上的铝的蚀刻停止层; 以及通过化学气相沉积工艺在所述蚀刻停止层的顶部沉积阻挡层，其中，在将所述蚀刻停止层沉积到化学气相沉积室之后，所述衬底从物理气相沉积室转移而不将所述衬底暴露于大气。

公开(公告)号：WO2011156349A2

公开(公告)日：2011-12-15

申请号：PCT/US2011/039414

申请日：2011-06-07

Applicant: APPLIED MATERIALS, INC. ,  LEE, Joung Joo ,  TANG, Xianmin ,  GUNG, Tza-Jing

Inventor： LEE, Joung Joo ,  TANG, Xianmin ,  GUNG, Tza-Jing

IPC: H01L21/28 ,  H01L21/3205

CPC classification number: H01L21/2855 ,  C23C14/046 ,  C23C14/345 ,  C23C14/3492 ,  H01L21/76882

Abstract: Methods for forming interconnect structures are provided herein. In some embodiments, a method for forming an interconnect on a substrate may include depositing a material atop an upper surface of the substrate and atop one or more surfaces of a feature disposed in the substrate by a first deposition process that deposits the material at a faster rate on the upper surface than on a bottom surface of the feature; depositing the material atop the upper surface of the substrate and atop one or more surfaces of the feature by a second deposition process that deposits the material at a greater rate on the bottom surface of the feature than on the upper surface of the substrate; and heating the deposited material to draw the deposited material towards the bottom surface of the feature to at least partially fill the feature with the deposited material.

Abstract translation: 本文提供形成互连结构的方法。 在一些实施例中，用于在衬底上形成互连的方法可以包括通过第一沉积工艺沉积衬底的上表面顶部的材料，以及设置在衬底中的特征的顶部的一个或多个表面上，所述第一沉积工艺以更快的速度沉积材料 在上表面上比在特征的底表面上的速率; 通过第二沉积工艺将所述材料沉积在所述基底的上表面顶部和所述特征的一个或多个表面上方，所述第二沉积工艺在所述特征的底表面上以比在所述基底的上表面上更大的速率沉积材料; 以及加热沉积的材料以将沉积的材料拉向特征的底表面，以至少部分地用沉积的材料填充该特征。

公开(公告)号：WO2011153095A2

公开(公告)日：2011-12-08

申请号：PCT/US2011/038357

申请日：2011-05-27

Applicant: APPLIED MATERIALS, INC. ,  GANGULI, Seshadri ,  YU, Sang Ho ,  LEE, Sang-Hyeob ,  HA, Hyoung-Chan ,  LEE, Wei Ti ,  KIM, Hoon ,  GANDIKOTA, Srinivas ,  LEI, Yu ,  MORAES, Kevin ,  TANG, Xianmin

Inventor： GANGULI, Seshadri ,  YU, Sang Ho ,  LEE, Sang-Hyeob ,  HA, Hyoung-Chan ,  LEE, Wei Ti ,  KIM, Hoon ,  GANDIKOTA, Srinivas ,  LEI, Yu ,  MORAES, Kevin ,  TANG, Xianmin

IPC: H01L29/78 ,  H01L21/336 ,  H01L21/31

CPC classification number: H01L21/28079 ,  H01L21/28088 ,  H01L21/32051 ,  H01L29/49

Abstract: Metal gate structures and methods for forming thereof are provided herein. In some embodiments, a method for forming a metal gate structure on a substrate having a feature formed in a high k dielectric layer may include depositing a first layer within the feature atop the dielectric layer; depositing a second layer comprising cobalt or nickel within the feature atop the first layer; and depositing a third layer comprising a metal within the feature atop the second layer to fill the feature, wherein at least one of the first or second layers forms a wetting layer to form a nucleation layer for a subsequently deposited layer, wherein one of the first, second, or third layers forms a work function layer, and wherein the third layer forms a gate electrode.

Abstract translation: 本文提供了金属门结构及其形成方法。 在一些实施例中，在具有形成在高k电介质层中的特征的衬底上形成金属栅极结构的方法可以包括在电介质层顶部的特征内沉积第一层; 在所述特征内在所述第一层顶部沉积包含钴或镍的第二层; 以及在第二层顶部沉积包括特征内的金属的第三层以填充该特征，其中第一层或第二层中的至少一层形成润湿层以形成后续沉积层的成核层，其中第一层 第二层或第三层形成功函数层，并且其中第三层形成栅电极。

公开(公告)号：WO2010115128A9

公开(公告)日：2010-10-07

申请号：PCT/US2010/029815

申请日：2010-04-02

Applicant: APPLIED MATERIALS, INC. ,  ALLEN, Adolph Miller ,  HAWRYLCHAK, Lara ,  XIE, Zhigang ,  RASHEED, Muhammand M. ,  WANG, Rongjun ,  TANG, Xianmin ,  LIU, Zhendong ,  GUNG, Tza-Jing ,  GANDIKOTA, Srinivas ,  CHANG, Mei ,  COX, Michael S. ,  YOUNG, Donny ,  SAVANDAIAH, Kirankumar ,  GE, Zhenbin

Inventor： ALLEN, Adolph Miller ,  HAWRYLCHAK, Lara ,  XIE, Zhigang ,  RASHEED, Muhammand M. ,  WANG, Rongjun ,  TANG, Xianmin ,  LIU, Zhendong ,  GUNG, Tza-Jing ,  GANDIKOTA, Srinivas ,  CHANG, Mei ,  COX, Michael S. ,  YOUNG, Donny ,  SAVANDAIAH, Kirankumar ,  GE, Zhenbin

IPC: H01L21/203 ,  C23C14/34

Abstract: Embodiments of the invention generally provide a processing chamber used to perform a physical vapor deposition (PVD) process and methods of depositing multi-compositional films. The processing chamber may include: an improved RF feed configuration to reduce any standing wave effects; an improved magnetron design to enhance RF plasma uniformity, deposited film composition and thickness uniformity; an improved substrate biasing configuration to improve process control; and an improved process kit design to improve RF field uniformity near the critical surfaces of the substrate. The method includes forming a plasma in a processing region of a chamber using an RF supply coupled to a multi-compositional target, translating a magnetron relative to the multi-compositional target, wherein the magnetron is positioned in a first position relative to a center point of the multi-compositional target while the magnetron is translating and the plasma is formed, and depositing a multi-compositional film on a substrate in the chamber.