Invention Application
- Patent Title: LATERAL HIGH ELECTRON MOBILITY TRANSISTOR WITH INTEGRATED CLAMP DIODE
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Application No.: PCT/US2017/064726Application Date: 2017-12-05
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Publication No.: WO2018106698A1Publication Date: 2018-06-14
- Inventor: ODNOBLYUDOV, Vladimir , AKTAS, Ozgur
- Applicant: QROMIS, INC.
- Applicant Address: 2306 Walsh Avenue Santa Clara, California 95051 US
- Assignee: QROMIS, INC.
- Current Assignee: QROMIS, INC.
- Current Assignee Address: 2306 Walsh Avenue Santa Clara, California 95051 US
- Agency: LIU, Rong et al.
- Priority: US62/430,649 20161206
- Main IPC: H01L29/20
- IPC: H01L29/20 ; H01L29/778
Abstract:
A method of forming a semiconductor device includes providing an engineered substrate, forming a gallium nitride layer coupled to the engineered substrate, forming a channel region coupled to the gallium nitride layer by forming an aluminum gallium nitride barrier layer on the front surface of the gallium nitride layer, forming a gate dielectric layer coupled to the aluminum gallium nitride barrier layer in the central portion of the channel region, forming a gate contact coupled to the gate dielectric layer, forming a source contact at the first end of the channel region, forming a via at the second end of the channel region, filling the via with a conductive material, forming a drain contact coupled to the via, removing the engineered substrate to expose the back surface of the epitaxial gallium nitride layer, and forming a drain pad on the back surface of the epitaxial gallium nitride layer.
Information query
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