公开(公告)号：WO2023082071A1

公开(公告)日：2023-05-19

申请号：PCT/CN2021/129677

申请日：2021-11-10

Applicant: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.

Inventor： ZHAO, Qiyue ,  SHI, Yu

IPC: H01L29/778 ,  H01L21/335

Abstract: A semiconductor device includes a first and a second nitride-based semiconductor layers, a first and a second electrodes, a first gate electrode, a first and a second field plates. The first field plate is disposed over the second nitride-based semiconductor layer and extends from a region between the first electrode and the first gate electrode to a region directly over the first gate electrode. The second field plate is disposed over the second nitride-based semiconductor layer and extends from a region between the first electrode and the first field plate to a region directly over the first field plate. The second field plate is horizontally spaced away from the first gate electrode.

公开(公告)号：WO2023082058A1

公开(公告)日：2023-05-19

申请号：PCT/CN2021/129622

申请日：2021-11-09

Applicant: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.

Inventor： HE, Chuan ,  PU, Xiaoqing ,  HAO, Ronghui ,  WONG, King Yuen

IPC: H01L29/778 ,  H01L29/10 ,  H01L29/06 ,  H01L21/335

Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a source electrode, a drain electrode, a gate electrode, and a third nitride-based semiconductor layer. The first nitride-based semiconductor layer has at least one trench. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer and spaced apart from the trench. The source electrode and the drain electrode are disposed above the second nitride-based semiconductor layer. The gate electrode is disposed above the second nitride-based semiconductor layer and between the source and drain electrodes, so as to at least define a drift region between the gate electrode and the drain electrode and overlaps with the trench. The third nitride-based semiconductor layer is at least disposed in the trench and extends upward from the trench to make contact with the second nitride-based semiconductor layer.

公开(公告)号：WO2023065284A1

公开(公告)日：2023-04-27

申请号：PCT/CN2021/125571

申请日：2021-10-22

Applicant: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.

Inventor： HE, Qingyuan ,  HAO, Ronghui ,  CHEN, Fu ,  ZHANG, Jinhan ,  WONG, King Yuen

IPC: H01L27/07 ,  H01L29/47 ,  H01L21/8252 ,  H01L21/338 ,  H01L29/778

Abstract: A nitride-based semiconductor device including a first and a second nitride-based semiconductor layers, a source electrode and a drain electrode, and a gate structure. The gate structure includes at least one conductive layer and two or more doped nitride-based semiconductor layers. The at least one conductive layer includes metal, and is in contact with the second nitride-based semiconductor layer to form a metal-semiconductor junction therebetween. The two or more doped nitride-based semiconductor layers are in contact with the second nitride-based semiconductor layer and abut against the conductive layer, so as to form contact interfaces abutting against the metal-semiconductor junction with the second nitride-based semiconductor.

公开(公告)号：WO2023042617A1

公开(公告)日：2023-03-23

申请号：PCT/JP2022/031873

申请日：2022-08-24

Applicant: ローム株式会社

Inventor： 柳原　学 ,  大嶽　浩隆

IPC: H01L29/778 ,  H01L21/28 ,  H01L21/3205 ,  H01L21/337 ,  H01L21/338 ,  H01L21/764 ,  H01L21/768 ,  H01L23/522 ,  H01L29/41 ,  H01L29/417 ,  H01L29/423 ,  H01L29/808 ,  H01L29/812

Abstract: 半導体装置（１０）は、電子走行層（１６）と、電子走行層（１６）との界面付近において電子走行層（１６）内に２ＤＥＧを発生させる電子供給層（１８）と、電子供給層（１８）上に配置されたソース電極（２２）およびドレイン電極（２４）と、電子供給層（１８）上に配置されアクセプタ型不純物を含むゲート部（２６）と、ゲート部（２６）上に配置されたゲート電極（２８）とを備える。半導体装置（１０）は、ＦＥＴの素子領域（Ｒ１）の外周部分（Ｒ１１）において電子供給層（１８）上に配置されたガードリング（３０）をさらに備える。ガードリング（３０）は、電子供給層（１８）上に配置されアクセプタ型不純物を含む遮蔽部（３２）と、遮蔽部（３２）上に配置されソース電極（２２）または２ＤＥＧに電気的に接続された第１電極（３４）とを含む。

公开(公告)号：WO2023037795A1

公开(公告)日：2023-03-16

申请号：PCT/JP2022/029663

申请日：2022-08-02

Applicant: 株式会社ジャパンディスプレイ

Inventor： 金城　拓海 ,  西村　眞澄 ,  青木　逸

IPC: H01L29/778 ,  H01L21/205 ,  H01L21/336 ,  H01L21/337 ,  H01L21/338 ,  H01L21/363 ,  H01L29/78 ,  H01L29/786 ,  H01L29/808 ,  H01L29/812

Abstract: トランジスタは、非晶質基板と、非晶質基板の上の導電性配向層と、導電性配向層の上の半導体層および半導体層と接する分極層を含むヘテロ接合構造体と、ヘテロ接合構造体の上のゲート電極と、を含み、ヘテロ接合構造体は、ゲート電極と重畳する領域に凹部を含む。前記凹部は、分極層に設けられていてもよく、半導体層に設けられていてもよい。

公开(公告)号：WO2023019496A1

公开(公告)日：2023-02-23

申请号：PCT/CN2021/113411

申请日：2021-08-19

Applicant: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.

Inventor： HE, Chuan ,  HAO, Ronghui ,  WONG, King Yuen

IPC: H01L29/778

Abstract: A nitride-based semiconductor circuit includes a nitride-based semiconductor carrier, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, connectors, a connection line, and a power supply line. The first nitride-based semiconductor layer is disposed over the nitride-based semiconductor carrier. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The connectors are disposed on the second nitride-based semiconductor layer. The connection line electrically connects to one of the connectors. The power supply line electrically to the nitride-based semiconductor carrier. A heterojunction is formed between the first and the second nitride-based semiconductor layers. A potential difference is applied between the power supply line and the connection line.

公开(公告)号：WO2023019436A1

公开(公告)日：2023-02-23

申请号：PCT/CN2021/113061

申请日：2021-08-17

Applicant: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.

Inventor： WANG, Pan ,  HSIEH, Wen-Yuan ,  CHEN, Hung-Yu

IPC: H01L29/778 ,  H01L21/335 ,  H01L29/20

Abstract: A semiconductor device includes a substrate, a first and a second nitride-based semiconductor layers, a doped nitride-based semiconductor layer, a gate electrode, a first and a second dielectric protection layers. The second nitride-based semiconductor layer has a bandgap greater than a bandgap of the first nitride-based semiconductor layer. The first and the second dielectric protection layers include oxygen. The first dielectric protection layer is conformal with a profile collectively constructed by the gate electrode, the doped nitride-based semiconductor layer, and the second nitride-based semiconductor layer. The second dielectric protection layer is in contact with the first dielectric protection layer. The first dielectric protection layer has an oxygen concentration less than that of the second dielectric protection layer.

公开(公告)号：WO2023015541A1

公开(公告)日：2023-02-16

申请号：PCT/CN2021/112399

申请日：2021-08-13

Applicant: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.

Inventor： CHEN, Fu ,  HAO, Ronghui ,  WONG, King Yuen

IPC: H01L29/778 ,  H01L21/335

Abstract: A semiconductor device includes a first to a third nitride-based semiconductor layers, a source electrode, a drain electrode and a gate electrode. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer and has a bandgap less than a bandgap of the first nitride-based semiconductor layer, so as to form a heterojunction therebetween with a two-dimensional hole gas (2DHG) region. A third nitride-based semiconductor layer is embedded in the second nitride-based semiconductor layer and spaced apart from the first nitride-based semiconductor layer. The third nitride-based semiconductor layer is doped to have a first conductivity type different than that of the second nitride-based semiconductor layer.

公开(公告)号：WO2023015495A1

公开(公告)日：2023-02-16

申请号：PCT/CN2021/112113

申请日：2021-08-11

Applicant: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.

Inventor： ZHAO, Qiyue ,  SHI, Yu

IPC: H01L29/778

Abstract: A semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a first gate electrode, a first S/D electrode, and a first field plate. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The first and second nitride-based semiconductor layers collectively have an active portion and an electrically isolating portion that is non-semi-conducting and surrounds the active portion to form at least two interfaces extending along a first direction and spaced apart from each other by the active portion. The first gate electrode and the first S/D electrode are disposed above the second nitride-based semiconductor layer. The first field plate is disposed above the second nitride-based semiconductor layer and extends along the second direction and across the two interfaces such that the field plate extends to the electrically isolating portion, and overlaps with the first gate electrode near the interfaces.

公开(公告)号：WO2023015493A1

公开(公告)日：2023-02-16

申请号：PCT/CN2021/112110

申请日：2021-08-11

Applicant: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.

Inventor： ZHAO, Qiyue ,  SHI, Yu

IPC: H01L29/778 ,  H01L21/335

Abstract: The semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a first source/drain (S/D) electrode, a second S/D electrode, a first gate electrode, a second gate electrode, a first passivation layer, a conductive layer, and a second passivation layer. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The first and second S/D electrodes and the first and second gate electrodes are disposed above the second nitride-based semiconductor layer. The first passivation layer covers the first and second gate electrodes. The conductive layer is disposed over the first passivation layer and includes an electrode portion and a field plate portion. The second passivation layer is disposed on the conductive layer and penetrates the conductive layer to make contact with the first passivation layer.