Invention Application
- Patent Title: FINE-FEATURED TRACES FOR INTEGRATED CIRCUIT PACKAGE SUPPORT STRUCTURES
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Application No.: PCT/US2017/061051Application Date: 2017-11-10
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Publication No.: WO2018118262A1Publication Date: 2018-06-28
- Inventor: FERGUSON, Shelby , OUYANG, Gong , AOKI, Russell S. , ZHANG, Zhichao , XIAO, Kai
- Applicant: INTEL CORPORATION
- Applicant Address: 2200 Mission College Boulevard Santa Clara, California 95054-1549 US
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: 2200 Mission College Boulevard Santa Clara, California 95054-1549 US
- Agency: ZAGER, Laura A.
- Priority: US15/383,858 20161219
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H05K1/18 ; H05K3/34
Abstract:
Disclosed herein are fine-featured traces for integrated circuit (IC) package support structures, and related systems, devices, and methods. For example, a device may include a printed circuit board (PCB) having an insulating material and a heater trace on the insulating material. In some embodiments, the heater trace may have a section with a width less than 3.5 mils. In some embodiments, a section of the heater trace may be adjacent to a burned portion of the insulating material.
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