公开(公告)号：WO2017112135A1

公开(公告)日：2017-06-29

申请号：PCT/US2016/062143

申请日：2016-11-16

Applicant: INTEL CORPORATION

Inventor： YEE, Rashelle ,  AOKI, Russell S. ,  FERGUSON, Shelby ,  HUI, Michael ,  CARSTENS, Jonathon Robert ,  JASNIEWSKI, Joseph J. ,  CEURTER, Kevin J.

IPC: H05K1/02 ,  H01L23/00

CPC classification number: H05K1/0271 ,  B23K1/0016 ,  B23K2201/42 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05B1/0233 ,  H05K1/0212 ,  H05K1/141 ,  H05K2201/041 ,  H05K2201/10378

Abstract: Disclosed herein are apparatus, systems, and methods for warpage mitigation in printed circuit board (PCB) assemblies. In some embodiments, a PCB assembly for warpage mitigation may include: a PCB; an interposer disposed on the PCB, wherein the interposer has a first face and an opposing second face, the first face is disposed between the second face and the PCB, conductive contacts are disposed at the second face, solder is disposed on the conductive contacts, the interposer includes a first heater trace proximate to the conductive contacts, and, when a first power is dissipated in the first heater trace, the first heater trace is to generate heat to cause the solder disposed on the conductive contacts to melt; wherein the PCB includes a second heater trace.

Abstract translation: 本文公开了用于印刷电路板（PCB）组件中的翘曲缓解的装置，系统和方法。 在一些实施例中，用于翘曲缓解的PCB组件可以包括：PCB; 设置在所述PCB上的中介层，其中所述中介层具有第一面和相对的第二面，所述第一面设置在所述第二面和所述PCB之间，在所述第二面设置导电触点，在所述导电触点上设置焊料， 所述内插器包括靠近所述导电触点的第一加热器迹线，并且当所述第一加热器迹线中的第一功率耗散时，所述第一加热器迹线将产生热量以使设置在所述导电触点上的所述焊料熔化; 其中PCB包括第二加热器迹线。

公开(公告)号：WO2017112136A1

公开(公告)日：2017-06-29

申请号：PCT/US2016/062146

申请日：2016-11-16

Applicant: INTEL CORPORATION

Inventor： HUI, Michael ,  YEE, Rashelle ,  THIBADO, Jonathan ,  CARTER, Daniel P. ,  FERGUSON, Shelby ,  VALPIANI, Anthony P. ,  AOKI, Russell S. ,  CARSTENS, Jonathon Robert ,  JASNIEWSKI, Joseph J. ,  KOFSTAD, Harvey R. ,  BRAZEL, Michael ,  CLACK, Tracy ,  VOGMAN, Viktor ,  WOODCOCK, Penny ,  CEURTER, Kevin J. ,  YAN, Hongfei

IPC: H01L23/34 ,  H01L23/00 ,  H01L23/48 ,  H01L23/498

CPC classification number: H01L23/345 ,  H01L21/4853 ,  H01L21/4871 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0655 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/81908 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2224/45099 ,  H01L2924/00

Abstract: Disclosed herein are integrated circuit (IC) package support structures, and related systems, devices, and methods. In some embodiments, an IC package support structure may include a first heater trace, and a second heater trace, wherein the second heater trace is not conductively coupled the first heater trace in the IC package support structure.

Abstract translation: 这里公开了集成电路（IC）封装支撑结构以及相关的系统，装置和方法。 在一些实施例中，IC封装支撑结构可以包括第一加热器迹线和第二加热器迹线，其中第二加热器迹线不导电地耦合到IC封装支撑结构中的第一加热器迹线。

公开(公告)号：WO2018118262A1

公开(公告)日：2018-06-28

申请号：PCT/US2017/061051

申请日：2017-11-10

Applicant: INTEL CORPORATION

Inventor： FERGUSON, Shelby ,  OUYANG, Gong ,  AOKI, Russell S. ,  ZHANG, Zhichao ,  XIAO, Kai

IPC: H05K1/02 ,  H05K1/18 ,  H05K3/34

CPC classification number: H01L23/345 ,  H01L23/49816 ,  H01L23/49838 ,  H01L2224/16225

Abstract: Disclosed herein are fine-featured traces for integrated circuit (IC) package support structures, and related systems, devices, and methods. For example, a device may include a printed circuit board (PCB) having an insulating material and a heater trace on the insulating material. In some embodiments, the heater trace may have a section with a width less than 3.5 mils. In some embodiments, a section of the heater trace may be adjacent to a burned portion of the insulating material.

公开(公告)号：WO2017112134A1

公开(公告)日：2017-06-29

申请号：PCT/US2016/062117

申请日：2016-11-16

Applicant: INTEL CORPORATION

Inventor： FERGUSON, Shelby ,  YEE, Rashelle ,  AOKI, Russell S. ,  HUI, Michael ,  CARSTENS, Jonathon Robert ,  JASNIEWSKI, Joseph J.

IPC: H01L23/34 ,  H01L23/00

CPC classification number: G01K7/16 ,  H01L23/3128 ,  H01L23/34 ,  H01L23/473 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0655 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/81908 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/16251 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/014 ,  H01L2224/45099

Abstract: Disclosed herein are integrated circuit (IC) packages with temperature sensor traces, and related systems, devices, and methods. In some embodiments, an IC package may include a package substrate and an IC die disposed on the package substrate, wherein the package substrate includes a temperature sensor trace, and an electrical resistance of the temperature sensor trace is representative of an equivalent temperature of the temperature sensor trace.

Abstract translation: 这里公开了具有温度传感器迹线的集成电路（IC）封装，以及相关的系统，装置和方法。 在一些实施例中，IC封装可以包括封装衬底和设置在封装衬底上的IC管芯，其中封装衬底包括温度传感器迹线，并且温度传感器迹线的电阻代表温度的等效温度 传感器跟踪。