MEMORY MANAGEMENT UNIT, ADDRESS TRANSLATION METHOD, AND PROCESSOR
Abstract:
The present invention discloses a memory management unit, an address translation method, and a processor. The memory management unit includes: a translation lookaside buffer adapted to store a plurality of translation entries, where each, translation entry includes a size flag hit, a virtual address tag, and a physical address tag, the virtual address tag represents a virtual page, the physical address tag represents a physical page corresponding to the virtual page, and the size flag bit. represents a page size of the virtual page: and a translation processing unit adapted to look up a translation entry whose virtual address tag matches a to-he-translated virtual address in the plurality of translation entries based cm the page size represented by the size flag bit of the translation entry, and. translate the virtual address into a physical address based on the matching translation entry.
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