MULTI-CORE PROCESSOR AND INTER-CORE DATA FORWARDING METHOD

    公开(公告)号:WO2021061374A1

    公开(公告)日:2021-04-01

    申请号:PCT/US2020/049414

    申请日:2020-09-04

    Abstract: The present invention discloses a multi-core processor and an inter-core data forwarding method. The multi-core processor includes a plurality of processor cores and a multi-core interconnection bus. The multi-core interconnection bus includes: a plurality of request processing interlaces, each of which Is adapted to receive a read data request sent by a coupled processor core, and send the read data request to a request storage unit; and the request storage unit, adapted to receive the read data request sent by the request processing interface, and forward the read data request to another request processing interface, where the request processing interface receives a read data request forwarded by the request storage unit, sends the read data request to the coupled processor core, receives a request result that is returned by the processor core by reading a cache of the processor core, and sends the request result to a request processing interface coupled to a processor core that initiates the request; and receives a request result sent by the another request processing interface, determines valid data based on the received request result, and sends the valid data to the coupled processor core.

    VIRTUAL DATA COPY SUPPORTING GARBAGE COLLECTION IN DISTRIBUTED FILE SYSTEMS

    公开(公告)号:WO2022094895A1

    公开(公告)日:2022-05-12

    申请号:PCT/CN2020/126866

    申请日:2020-11-05

    Abstract: Methods and systems implement a virtual copy operation which improves support of preemptive garbage collection policies at a distributed file system. A garbage collection process preemptively performs copying upon data in a log-structured file system. So that thread-blocking write operations are not distributed across nodes of a distributed file system node cluster, and thus avoid degradation of computational performance, a virtual copy operation is provided which, based on master node metadata, locates each chunk node storing blocks to be virtual copied and calls a remap API of a logical address mapper provided by a local file system of the chunk node. The logical address mapper of each chunk node performs remaps of disk addresses from source logical block addresses to destination block addresses, without relocating data from one disk address to another. The results of these remaps may be stored as metadata at the master node, replacing previously mapped metadata.

    STORAGE MANAGEMENT APPARATUS, STORAGE MANAGEMENT METHOD, PROCESSOR, AND COMPUTER SYSTEM

    公开(公告)号:WO2021061446A1

    公开(公告)日:2021-04-01

    申请号:PCT/US2020/050855

    申请日:2020-09-15

    Abstract: A storage management apparatus, a storage management method, a processor, and a computer system are disclosed. The storage management apparatus includes: at least one translation look-aside buffer, configured to store a plurality of cache entries, where the plurality of cache entries include a plurality of level 1 cache entries and a plurality of level 2 cache entries; and an address translation unit, coupled to the at least one translation look-aside buffer, and adapted to translate, based on one of the plurality of level 1 cache entries, a virtual address specified by a translation request into a corresponding translated address, or when the translation request does not hit any one of the plurality of level.1 cache entries, translate, based on one of the plurality of level 2 cache entries, a virtual address specified by the translation request into a corresponding translated address. In embodiments of the present disclosure, a hierarchical search is performed among the plurality of cache entries based on the virtual address specified by the translation request. Therefore, time required by searching for a cache entry in an address translation process is reduced, efficiency, frequency, and performance of a processor are improved, and power consumption is reduced.

    EXCHANGING INFORMATION VIA A DESIGNATED APPLICATION
    4.
    发明申请
    EXCHANGING INFORMATION VIA A DESIGNATED APPLICATION 审中-公开
    通过指定的应用程序交换信息

    公开(公告)号:WO2014074800A1

    公开(公告)日:2014-05-15

    申请号:PCT/US2013/069111

    申请日:2013-11-08

    Abstract: Exchanging information via a designated application includes establishing a voice communication link with a client device, sending a launch command associated with a designated application to the client device via the voice communication link, wherein the launch command is configured to cause the designated application to be launched at the client device; and exchanging information with the client device using the designated application, wherein the designated application is configured to receive input information and the input information is received from the client device.

    Abstract translation: 通过指定的应用交换信息包括建立与客户端设备的语音通信链路,经由语音通信链路向客户端设备发送与指定的应用相关联的启动命令,其中启动命令被配置为使指定的应用程序被启动 在客户端设备; 以及使用所指定的应用与所述客户端设备交换信息,其中所述指定应用被配置为接收输入信息,并且从所述客户端设备接收所述输入信息。

    MEMORY MANAGEMENT UNIT, ADDRESS TRANSLATION METHOD, AND PROCESSOR

    公开(公告)号:WO2021061466A1

    公开(公告)日:2021-04-01

    申请号:PCT/US2020/051019

    申请日:2020-09-16

    Abstract: The present invention discloses a memory management unit, an address translation method, and a processor. The memory management unit includes: a translation lookaside buffer adapted to store a plurality of translation entries, where each, translation entry includes a size flag hit, a virtual address tag, and a physical address tag, the virtual address tag represents a virtual page, the physical address tag represents a physical page corresponding to the virtual page, and the size flag bit. represents a page size of the virtual page: and a translation processing unit adapted to look up a translation entry whose virtual address tag matches a to-he-translated virtual address in the plurality of translation entries based cm the page size represented by the size flag bit of the translation entry, and. translate the virtual address into a physical address based on the matching translation entry.

    ADDRESS TRANSLATION METHODS AND SYSTEMS
    6.
    发明申请

    公开(公告)号:WO2021061465A1

    公开(公告)日:2021-04-01

    申请号:PCT/US2020/051004

    申请日:2020-09-16

    Abstract: A storage management apparatus, a storage management method, a processor, and a computer system are disclosed. The storage management apparatus includes; a translation look-aside buffer configured to store a plurality of cache entries; an address translation unit configured to translate a virtual address specified by a translation request to a corresponding translation address- based on one of the plurality of cache entries; and a control unit coupled to at least one translation look-aside buffer and configured to expand an address range mapped to the selected cache entry. According to embodiments of this disclosure, a translatable address range of the translation look-aside buffer can be expanded, a hit rate of the translation look-aside buffer can be increased, and an execution time of address translation can be reduced, thereby improving performance of the processor and the system.

    BYTE COMPARISON METHOD FOR STRING PROCESSING AND INSTRUCTION PROCESSING APPARATUS

    公开(公告)号:WO2021061464A1

    公开(公告)日:2021-04-01

    申请号:PCT/US2020/050999

    申请日:2020-09-16

    Abstract: Embodiments of the present disclosure provide an instruction processing apparatus, comprising a first register configured to store a source string, wherein the source string comprises at least one byte, and an execution circuitry, communicatively coupled to the first register and configured to execute a comparison instruction to compare the at least one byte in the source string with an ending identifier to obtain a result value corresponding to the source string, wherein the comparison instruction is executed on each of the at least one byte in the source string and the comparison instruction is an assembly code instruction.

    DEVICE, PROCESSOR, AND METHOD FOR SPLITTING INSTRUCTIONS AND REGISTER RENAMING

    公开(公告)号:WO2020180565A1

    公开(公告)日:2020-09-10

    申请号:PCT/US2020/019941

    申请日:2020-02-26

    Abstract: Embodiments of the present disclosure provides a processor, a device, and a method for executing instructions, comprising: decoding instructions to identify a instruction to be split: splitting the identified instruction into two or more split instructions, the split instructions including correlated instructions having a correlation, and the correlated instructions having a corresponding virtual register; performing register renaming on the split instructions, wherein for the correlated instructions, a first physical register configured to save results and allocated to the corresponding virtual register is the same as a second physical register designated to be released after executing at least one of the split instructions; and executing the split instructions after the register renaming.

    METHOD AND APPARATUS FOR INFORMATION VERIFICATION
    9.
    发明申请
    METHOD AND APPARATUS FOR INFORMATION VERIFICATION 审中-公开
    信息验证的方法和装置

    公开(公告)号:WO2014099816A1

    公开(公告)日:2014-06-26

    申请号:PCT/US2013/075479

    申请日:2013-12-16

    Abstract: The present disclosure provides a method and an apparatus for user verification. A terminal device recognizes a sequence of click operations made by the user according to a maneuver prompted on a terminal device. The sequence of click operations carries operation information from which a click pattern characteristic, such as a characteristic code, can be determined. Upon receiving the determined click pattern characteristic, a server verifies the user input by matching the click pattern characteristic with a verification code set or stored by the server. The click pattern characteristic may be based on recognizing clicking or tapping operations performed by the user at a specified time and/or in a designated area. The method enables user verification on devices that lowers the rate of errors in the user input of verification codes.

    Abstract translation: 本公开提供了一种用于用户验证的方法和装置。 终端设备根据终端设备提示的操作来识别用户进行的点击操作的顺序。 点击操作的顺序带有操作信息,从中可以确定诸如特征码的点击图案特征。 在接收到确定的点击模式特征后,服务器通过将点击模式特征与由服务器设置或存储的验证码进行匹配来验证用户输入。 点击图案特征可以基于在指定时间和/或指定区域中识别用户执行的点击或敲击操作。 该方法使用户能够在降低用户输入验证码的错误率的设备上进行验证。

    METHOD AND APPARATUS OF ACCOUNT LOGIN
    10.
    发明申请
    METHOD AND APPARATUS OF ACCOUNT LOGIN 审中-公开
    帐户登录的方法和设备

    公开(公告)号:WO2014089098A1

    公开(公告)日:2014-06-12

    申请号:PCT/US2013/072896

    申请日:2013-12-03

    Abstract: The present disclosure discloses a method and an apparatus of account login to solve the problem of low efficiency of account login in existing technologies. A client of the method captures an image of a first credential of a user, recognizes user information of the user that is included in the captured image, includes the recognized user information into a login request, and sends the login request to a server for logging into an account that corresponds to the user information. Through this method, a user does not need to input his/her username when using a client for account login, but perform the account login by directly capturing an image of a first credential using an image capturing device of the client, thus effectively improving the efficiency of account login.

    Abstract translation: 本公开公开了一种帐户登录的方法和装置,以解决现有技术中的帐户登录效率低的问题。 该方法的客户端捕获用户的第一凭证的图像,识别包括在所捕获的图像中的用户的用户信息,将识别的用户信息包括在登录请求中,并将登录请求发送到服务器进行日志记录 转换成对应于用户信息的帐户。 通过这种方法,用户不需要在使用客户端进行帐号登录时输入他/她的用户名,而是通过使用客户端的图像捕获设备直接捕获第一个证书的图像来执行帐户登录,从而有效地改善了 帐户登录效率

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