Invention Application
- Patent Title: PILLAR CAPACITOR AND METHOD OF FABRICATING SUCH
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Application No.: PCT/US2020/066958Application Date: 2020-12-23
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Publication No.: WO2021133983A1Publication Date: 2021-07-01
- Inventor: THAREJA, Gaurav , MANIPATRUNI, Sasikanth , DOKANIA, Rajeev Kumar , RAMESH, Ramamoorthy , MATHURIYA, Amrita
- Applicant: KEPLER COMPUTING INC.
- Applicant Address: 180 Steuart Street #192524
- Assignee: KEPLER COMPUTING INC.
- Current Assignee: KEPLER COMPUTING INC.
- Current Assignee Address: 180 Steuart Street #192524
- Agency: MUGHAL, Usman A.
- Priority: US16/729,278 2019-12-27
- Main IPC: H01L27/11507
- IPC: H01L27/11507 ; H01L49/02 ; G11C11/221 ; H01L27/11502 ; H01L28/40
Abstract:
The memory bit-cell formed using the ferroelectric capacitor results in a taller and narrower bit-cell compared to traditional memory bit-cells. As such, more bit-cells can be packed in a die resulting in a higher density memory that can operate at lower voltages than traditional memories while providing the much sought after non- volatility behavior. The pillar capacitor includes a plug that assists in fabricating a narrow pillar.
Information query
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