Process for etching heterojunction interfaces and corresponding layer structures
    1.
    发明公开
    Process for etching heterojunction interfaces and corresponding layer structures 审中-公开
    的蚀刻接口在异质结和相应的层结构的方法

    公开(公告)号:EP1174913A3

    公开(公告)日:2004-07-14

    申请号:EP01110433.8

    申请日:2001-04-27

    IPC分类号: H01L21/306

    摘要: Systems and methods of manufacturing etchable heterojunction interfaces and etched heterojunction structures are described. A bottom layer (14) is deposited on a substrate (16), a transition etch layer (20) is deposited over the bottom layer (14), and a top layer (12) is deposited over the transition etch layer (20). The transition etch layer (20) substantially prevents the bottom layer (14) and the top layer (12) from forming a material characterized by a composition substantially different than the bottom layer (14) and a substantially non-selective etchability with respect to the bottom layer (14). By tailoring the structure of the heterojunction interface to respond to heterojunction etching processes with greater predictability and control, the transition etch layer (20) enhances the robustness of previously unreliable heterojunction device manufacturing processes. The transition etch layer (20) enables one or more vias (72) to be etched down to the top surface of the bottom layer (14) in a reliable and repeatable manner. In particular, because the transition etch layer (20) enables use of an etchant that is substantially selective with respect to the bottom layer (14), the thickness of critical device layers may be determined by the precise epitaxial growth processes used to form the bottom layer (14) rather than relatively imprecise non-selective etch processes.

    Process for etching heterojunction interfaces and corresponding layer structures
    2.
    发明公开
    Process for etching heterojunction interfaces and corresponding layer structures 审中-公开
    的蚀刻接口在异质结和相应的层结构的方法

    公开(公告)号:EP1174913A2

    公开(公告)日:2002-01-23

    申请号:EP01110433.8

    申请日:2001-04-27

    摘要: Systems and methods of manufacturing etchable heterojunction interfaces and etched heterojunction structures are described. A bottom layer (14) is deposited on a substrate (16), a transition etch layer (20) is deposited over the bottom layer (14), and a top layer (12) is deposited over the transition etch layer (20). The transition etch layer (20) substantially prevents the bottom layer (14) and the top layer (12) from forming a material characterized by a composition substantially different than the bottom layer (14) and a substantially non-selective etchability with respect to the bottom layer (14). By tailoring the structure of the heterojunction interface to respond to heterojunction etching processes with greater predictability and control, the transition etch layer (20) enhances the robustness of previously unreliable heterojunction device manufacturing processes. The transition etch layer (20) enables one or more vias (72) to be etched down to the top surface of the bottom layer (14) in a reliable and repeatable manner. In particular, because the transition etch layer (20) enables use of an etchant that is substantially selective with respect to the bottom layer (14), the thickness of critical device layers may be determined by the precise epitaxial growth processes used to form the bottom layer (14) rather than relatively imprecise non-selective etch processes.

    摘要翻译: 系统和制造蚀刻异质结界面的方法和蚀刻异质结结构进行说明。 底部层(14)沉积在基板(16),过渡蚀刻层(20)沉积在所述底层(14)和顶部层(12)沉积在过渡蚀刻层(20)。 过渡蚀刻层(20)基本上防止所述底层(14)和从形成由比底部层(14)基本上不同的组合物为特征的材料顶部层(12)和基本上非选择性蚀刻性相对于所述 底层(14)。 通过定制的异质结界面的结构,以对异质结蚀刻工艺具有更大的可预测性和控制作出响应,过渡蚀刻层(20)增强了以前不可靠的异质结器件的制造工艺的鲁棒性。 过渡蚀刻层(20)使得一个或多个通孔(72)被向下蚀刻至以可靠和可重复的方式的底层(14)的顶面。 特别是,由于过渡蚀刻层(20),允许使用的蚀刻剂的并基本上是选择性相对于所述底部层(14),关键的器件层的厚度可以是确定由用来形成底部的精确外延生长工艺开采 层(14),而不是不精确相对非选择性蚀刻工艺。