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    ADAPTIVE OPTIMIZATION OF LOW POWER STRATEGIES
    1.
    发明公开
    ADAPTIVE OPTIMIZATION OF LOW POWER STRATEGIES 审中-公开
    低功耗策略的自适应优化

    公开(公告)号：EP3242184A1

    公开(公告)日：2017-11-08

    申请号：EP16177984.8

    申请日：2016-07-05

    申请人： MediaTek Inc.

    发明人： HSIAO, Kuo-Su ,  LEE, Yen-Lin ,  CHIU, Shih-Yen ,  CHEN, Jia-Ming ,  PENG, Mark Shane ,  CHANG, Ya-Ting

    IPC分类号： G06F1/32 ,  G06F1/20

    CPC分类号： G06F1/3287 ,  G06F1/206 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/324 ,  G06F1/3243 ,  G06F1/329 ,  G06F1/3293 ,  G06F1/3296

    摘要： Methods and apparatus are provided for adaptive optimization of low-power strategies. In one novel aspect, the device monitors one or more thermal-performance parameters and determines a plurality of operation scenarios for a plurality of corresponding low-power policies. Based on corresponding operation scenarios, the device selects corresponding low-power policy. The device applies different low-power strategy for temperature control based on low-power policies. Different low-powder policy is applied to different low-power techniques, such as the DVFS, the CPU hot-plug, and the task migration. In another novel aspect, the device obtains one or more user-defined policy for each corresponding low-power technique. The selection of each low-power policy is further based on its corresponding user-defined policy. In one embodiment, the user-defined DVFS policy includes power policy, performance policy, and DVFS-balanced policy. The user-defined CPU hot-plug policy includes conservative policy, aggressive policy, and hot-plug-balanced policy. The user-defined task-migration policy includes performance policy, and task-migration-balanced policy.

    摘要翻译： 提供了用于低功率策略的自适应优化的方法和装置。 在一个新颖方面，设备监视一个或多个热性能参数并确定多个对应的低功率策略的多个操作场景。 根据相应的操作场景，设备会选择相应的低功耗策略。 该器件基于低功耗策略应用不同的低功耗策略进行温度控制。 不同的低功耗策略适用于不同的低功耗技术，如DVFS，CPU热插拔和任务迁移。 在另一新颖性方面，设备为每个对应的低功率技术获得一个或多个用户定义的策略。 每个低功率策略的选择还基于其相应的用户定义策略。 在一个实施例中，用户定义的DVFS策略包括功率策略，性能策略和DVFS平衡策略。 用户定义的CPU热插拔策略包括保守策略，激进策略和热插拔均衡策略。 用户定义的任务迁移策略包括性能策略和任务迁移平衡策略。

    DYNAMIC FREQUENCY SCALING IN MULTI-PROCESSOR SYSTEMS
    3.
    发明公开
    DYNAMIC FREQUENCY SCALING IN MULTI-PROCESSOR SYSTEMS 审中-公开
    EN EN EN EN EN EN EN EN EN EN EN EN EN EN EN EN EN EN

    公开(公告)号：EP3042263A1

    公开(公告)日：2016-07-13

    申请号：EP15841962.2

    申请日：2015-09-17

    申请人： MediaTek Inc.

    发明人： CHANG, Ya-Ting ,  YONG, Lee-Kee ,  CHIU, Shih-Yen ,  LEE, Ming-Hsien ,  CHEN, Jia-Ming ,  LIN, Yu-Ming ,  CHOU, Hung-Lin ,  LO, Tzu-Jen ,  SOON, Koon Woon

    IPC分类号： G06F1/32

    CPC分类号： G06F1/324 ,  G06F1/20 ,  G06F1/206 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

    摘要： A computing system with multiple processor cores manages power and performance by dynamic frequency scaling. The system detects a condition when a total number of active processor cores within one or more clusters is less than a predetermined number, and an operating frequency of the active processor cores has risen to a specified highest frequency. The system also obtains ambient temperature measurement of the one or more clusters. Upon detecting the condition, the system increases the operating frequency above the specified highest frequency based on the ambient temperature measurement while maintaining a same level of supply voltage to the active processor cores.

    摘要翻译： 具有多个处理器内核的计算系统通过动态频率缩放来管理功耗和性能。 当一个或多个群集中的活动处理器核心的总数小于预定数量时，系统检测到条件，并且活动处理器核心的工作频率已升高到指定的最高频率。 该系统还获得一个或多个簇的环境温度测量。 在检测到这种情况时，系统会根据环境温度测量值将工作频率提高到规定的最高频率以上，同时保持与主动处理器内核相同的电源电压。

    PERFORMANCE AND POWER BALANCED CACHE PARTIAL POWER DOWN POLICY
    4.
    发明公开
    PERFORMANCE AND POWER BALANCED CACHE PARTIAL POWER DOWN POLICY 审中-实审

    公开(公告)号：EP4339788A1

    公开(公告)日：2024-03-20

    申请号：EP23195149.2

    申请日：2023-09-04

    申请人： MediaTek Inc.

    发明人： CHEN, Yu-Pin ,  CHEN, Jia-Ming ,  LAI, Chien-Yuan ,  CHANG, Ya-Ting ,  CHEN, Cheng-Tse

    IPC分类号： G06F12/0871 ,  G06F12/0864

    摘要： A computing system performs partial cache deactivation. The computing system estimates the leakage power of a cache based on operating conditions of the cache including voltage and temperature. The computing system further identifies a region of the cache as a candidate for deactivation based on cache hit counts. The computing system then adjusts the size of the region for the deactivation based on the leakage power and a bandwidth of a memory hierarchy device. The memory hierarchy device is at the next level to the cache in a memory hierarchy of the computing system.

    DYNAMIC SWITCHING OF VOLTAGE REGULATORS IN A MULTIPROCESSOR SYSTEM
    6.
    发明公开
    DYNAMIC SWITCHING OF VOLTAGE REGULATORS IN A MULTIPROCESSOR SYSTEM 审中-公开
    EINEM多媒体系统中的动态侦听VAN SPANNUNGSREGLERN

    公开(公告)号：EP3121682A1

    公开(公告)日：2017-01-25

    申请号：EP16173058.5

    申请日：2016-06-06

    申请人： MediaTek Inc.

    发明人： CHEN, Jia-Ming ,  CHOU, Hung-Lin ,  HSIAO, Pi-Cheng ,  LEE, Yen-Lin ,  CHANG, Ya-Ting ,  HSU, Jih-Ming

    IPC分类号： G06F1/26 ,  G06F1/32

    CPC分类号： G06F1/3234 ,  G06F1/263 ,  G06F1/3206 ,  G06F1/3287 ,  G06F9/5094 ,  Y02D10/171

    摘要： A switch interconnect is dynamically controlled at runtime to connect power sources to processing units in a multiprocessor system. Each power source is shareable by the processing units and each processing unit has a required voltage for processing a workload. When a system condition is detected at runtime, the switch interconnect is controlled to change a connection between at least one processing unit and a shared power source to maximize power efficiency. The shared power source is one of the power sources that supports multiple processing units having different required voltages.

    摘要翻译： 交换机互连在运行时动态控制，以将电源连接到多处理器系统中的处理单元。 每个电源可由处理单元共享，并且每个处理单元具有用于处理工作负载的所需电压。 当在运行时检测到系统条件时，控制开关互连以改变至少一个处理单元和共享电源之间的连接以最大化功率效率。 共享电源是支持具有不同所需电压的多个处理单元的电源之一。