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公开(公告)号:EP4351233A3
公开(公告)日:2024-07-03
申请号:EP24158696.5
申请日:2018-02-23
申请人: INTEL Corporation
发明人: KOKER, Altug , APPU, Abhishek R. , VEERNAPU, Kiran C. , RAY, Joydeep , VEMBU, Balaji , SURTI, Prasoonkumar , SINHA, Kamal , HOEKSTRA, Eric J. , FU, Wenyin , KABURLASOS, Nikos , BOROLE, Bhushan M. , SCHLUESSLER, Travis T. , SHAH, Ankur N. , KENNEDY, Jonathan
CPC分类号: G06F1/3203 , G06F1/324 , H04W52/0258 , Y02D10/00 , Y02D30/70 , H04M1/72448 , G06T1/20
摘要: An apparatus is disclosed with one or more processors including a graphics processing unit, the graphics processing unit including a graphics processing pipeline, and a memory to store data, including graphics data processed by the graphics processing pipeline, wherein the graphics processing unit is to conduct a training session with an application, the training session including a plurality of executions of the application utilizing the graphics processing pipeline, wherein the plurality of executions of the application includes executing the application under a plurality of different operating parameters, a plurality of different hardware configurations, or both, collect performance data for the application during the plurality of executions of the application, generate a performance profile for the application as processed in the graphics processing pipeline based on the collected performance data, train a neural network to configure the graphics processing pipeline based on performance profile data from the performance profile for the application, and utilize the trained neural network to configure the graphics processing pipeline to execute an instance of the application. Furthermore, a method and one or more computer-readable media are disclosed.
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公开(公告)号:EP4372564A1
公开(公告)日:2024-05-22
申请号:EP23209347.6
申请日:2023-11-13
申请人: NXP USA, Inc.
IPC分类号: G06F11/14 , G06F11/07 , G06F1/3203 , G06F21/79
CPC分类号: G06F11/1441 , G06F11/0778 , G06F1/3203 , G06F11/1417 , G06F21/79 , G06F11/0796
摘要: A system-on-chip (SoC) having a switchable power domain capable of being placed in a standby mode during which a power supply of the switchable power domain is gated and having an always-on power domain. The always-on power domain includes an input sampling circuit, and the switchable power domain includes an input/output (IO) circuit configured to, during normal operation, receive data at a corresponding signal pin when an input buffer of the IO circuit is enabled, in which the corresponding signal pin is coupled to the input sampling circuit. The input sampling circuit is configured to, while the switchable power domain is entering the standby mode but before the power supply is gated, provide an override input enable signal to enable the input buffer of the IO circuit, sample an input bit value on the corresponding signal pin, and store the sampled bit value to provide an injection current fault indicator.
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公开(公告)号:EP3850465B1
公开(公告)日:2024-05-01
申请号:EP19861222.8
申请日:2019-09-13
IPC分类号: G06F1/3296 , G06F1/3287 , G06F1/3234 , G06F1/3212 , G06F1/3206 , G06F9/50 , G06F9/48 , H02J3/38 , H02J3/14 , H02S10/10
CPC分类号: G06F1/3287 , G06F1/26 , G06F1/20 , G06F1/3203 , H02J7/35 , H02J9/06 , Y02E10/50 , Y02P90/50 , Y02B10/70 , Y02D10/00
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公开(公告)号:EP4352589A1
公开(公告)日:2024-04-17
申请号:EP21755160.5
申请日:2021-07-16
申请人: Google LLC
IPC分类号: G06F1/18 , G06F1/26 , G06F1/3203 , G06F1/3234 , G06F1/3287 , G06F1/3296
CPC分类号: G06F1/26 , G06F1/3203 , G06F1/3243 , G06F1/3296 , G06F1/3287 , G06F1/189 , Y02D10/00
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公开(公告)号:EP3417524A1
公开(公告)日:2018-12-26
申请号:EP17708387.0
申请日:2017-02-17
摘要: Aspects extend to methods, systems, and computer program products for balancing input phases across server rack power supplies. A rack manager can monitor individual Alternating Current (AC) phase currents at the rack level. The rack manager knows (or can at least determine) which power supplies are connected to which phase. The rack manager can micro adjust individual PSU output voltages to balance current phases at the rack level. Balancing can occur in response to changed server workloads, hot-unplug of one or more servers, etc. When there is one PSU per server, phase balancing can be accomplished by connecting outputs of power supplies together via busbar or wire. Output voltages of individual power supplies can be adjusted to achieve better phase balancing. Phase imbalance can be corrected by a bus bar or wire carrying enough load to correct phase imbalance.
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公开(公告)号:EP1609047B1
公开(公告)日:2018-12-26
申请号:EP04711800.5
申请日:2004-02-17
申请人: Intel Corporation
发明人: NAVEH, Alon , KUMAR, Mohan , GUTMAN, Mickey , MARTWICK, Andrew , SOLOMON, Gary
CPC分类号: G06F1/3287 , G06F1/3203 , G06F1/3209 , H04L12/40039 , Y02D10/171
摘要: Briefly, system and method for message-based power management which may be used, for example, in computer systems and communications networks. Embodiments of the present invention may include, for example, a device connected to a power management controller (PMC); the device and/or the PMC may send, receive, and/or process power management event (PME) messages. Embodiments of the present invention may operate using links in communicative and/or non-communicative modes. Embodiments of the present invention may include a switch, to send/receive, process, create, re-format and/or route one or more PME message on behalf of various devices, for example, a Peripheral Component Interconnect (PCI) device.
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公开(公告)号:EP2189877B1
公开(公告)日:2018-12-12
申请号:EP09162791.9
申请日:2009-06-16
发明人: Yeh, Chun-Te , Chen, Chung-Wen
IPC分类号: G06F1/32
CPC分类号: G06F1/3203 , G06F1/3287 , Y02D10/171
摘要: The present invention discloses an electronic device for reducing power consumption during power off of computer motherboard. When the computer motherboard is at S5 soft off state of ACPI, it will make the computer motherboard enter like G3 mechanical off state of ACPI. The electronic device will cut off a portion of electric components consuming stand-by power on the computer motherboard, and only supply the stand-by power to the electronic device itself. Only after the user pressed the power button, the electronic device will connect the stand-by power to the computer motherboard.
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公开(公告)号:EP3125072B8
公开(公告)日:2018-11-14
申请号:EP16181942.0
申请日:2016-07-29
发明人: ANSORREGUI, Daniel , STARACE, Marco , MUNIKRISHNAPPA, Ramesh , ANWAR, Zeeshan , SARAVANAN, Karthikeyan
IPC分类号: G06F1/32
CPC分类号: G06F1/3287 , G06F1/3203 , G06F1/3206 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要: Provided is a method of managing power of an electronic device. The method includes: obtaining operation information related to an operation from among operations performed by the electronic device. The operation is recognizable to a user via a product of hardware processing performed by hardware included in the electronic device. The method also includes obtaining load information related to a load generated by the operation performed by the electronic device. In addition, the method includes performing power management on the hardware included in the electronic device based on the operation information and the load information.
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公开(公告)号:EP2130106B1
公开(公告)日:2018-11-14
申请号:EP08719838.8
申请日:2008-03-26
申请人: Nytell Software LLC
IPC分类号: G06F1/32
CPC分类号: G06F1/3203 , Y02D10/126
摘要: An electronic device is provided with at least one functional unit (HB) performing a processing, wherein the functional unit (HB) receives a supply current (Isupply). A supply current monitor (SCM) is provided for monitoring the supply current (Isupply) to determine an average supply current (Iavg). A characterization unit (CU) is provided for determining a first relation between the averaged supply current (Iavg) and an operation frequency of the functional unit and/or for determining a second relation between a workload of the functional unit (HB) and the average supply current (Iavg) of the functional unit (HB). Furthermore, a slope calculation unit (SCU) is provided for determining the slope of the first and/or second relation. The operation of the functional unit (HB) is controlled according to the results of the slope calculation unit (SCU).
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公开(公告)号:EP3396490A1
公开(公告)日:2018-10-31
申请号:EP18162606.0
申请日:2018-03-19
申请人: INTEL Corporation
CPC分类号: G06T1/20 , G06F1/3203 , G06F1/3231 , G06F1/3234 , G06F1/3265 , G06T1/60 , G09G2330/021 , G09G2340/0435 , G09G2354/00
摘要: In an example, an apparatus comprises logic, at least partially comprising hardware logic, to receive an input from one or more detectors proximate a display to present an output from a graphics pipeline, determine that a user is not interacting with the display, and in response to a determination that the user is not interacting with the display, to reduce a frame rendering rate of the graphics pipeline. Other embodiments are also disclosed and claimed.
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