METHOD AND DEVICE FOR AMBIENT LIGHT MEASUREMENT

    公开(公告)号:EP3855417A1

    公开(公告)日:2021-07-28

    申请号:EP20153603.4

    申请日:2020-01-24

    发明人: RAYNOR, Jeff M.

    IPC分类号: G09G3/20 H01L27/32 G02F1/133

    摘要: The present disclosure relates to a method of measuring ambient light comprising: generating, by an ambient light sensor (104) associated with a screen which alternates between first phases in which light is emitted and second phases in which no light is emitted by the screen, a first signal (L_int) representative of an intensity of light received by the ambient light sensor (104) during the first and second phases; comparing said first signal (L_int) with a threshold intensity value (th); and controlling a timing of an ambient light measurement by the light sensor based on said comparison (COMP).

    METHOD AND DEVICE FOR AMBIENT LIGHT MEASUREMENT

    公开(公告)号:EP3839930A1

    公开(公告)日:2021-06-23

    申请号:EP19218320.0

    申请日:2019-12-19

    发明人: RAYNOR, Jeff M.

    IPC分类号: G09G3/32

    摘要: The present disclosure relates to a method for controlling an electronic device (100) comprising:
    controlling a screen (102) to alternate periodically between a first phase in which the screen emits light and a second phase in which no light is emitted by the screen (102); and
    precharging a charge pump (205) of an ambient light sensor (106) during the first phase, the ambient light sensor comprising at least one single-photon avalanche diode (204) powered by the charge pump.

    ZERO-POWER COMMUNICATION
    5.
    发明公开

    公开(公告)号:EP4198753A1

    公开(公告)日:2023-06-21

    申请号:EP21306804.2

    申请日:2021-12-16

    摘要: The present disclosure relates to a secondary device (S) comprising a first port (S1) receiving a clock signal from a first port (M1) of a primary device (M) and a second port (S2) connected to a second port (M2) of the primary device (M). The clock signal (ZPclk) determines, for each bit transmission (DATA, ACK, CTRL), first, second, third and fourth successive phases. The secondary device (S) puts its second port (S2) in a high impedance state during the first, second and fourth phases of each bit transmission. During the third phase of each transmission of a bit of data from the secondary device (S) to the primary device (M), the secondary device (S) discharges its second port (S2) when the transmitted bit has a first value and leaves its second port (S2) in a high impedance state when the transmitted bit has a second value.