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公开(公告)号：EP0813205A3
公开(公告)日：1999-09-29
申请号：EP97109220.0
申请日：1993-04-28
IPC分类号： G11C5/00
CPC分类号： G11C5/04 , G11C5/00 , H05K1/117 , H05K1/141 , H05K1/181 , H05K3/403 , H05K2201/09645 , H05K2201/10689 , H05K2203/1572 , Y10S439/951
摘要： A single in-line memory module comprising:
a printed circuit card having a first and a second face and including connector means for coupling said printed circuit card to a circuit element; a plurality of memory devices disposed on said first and second faces, said memory devices arranged in first, second and third configurations; said first configuration comprising at least two memory elements disposed in a back to back position on said first and second faces and electrically coupled to one another; said second configuration comprising at least two of said first configurations coupled to one another in a side by side arrangement; said third configuration comprising at least two of said second configurations coupled together.-
2.发明公开Bus architecture for integrated data and video memory 失效Busarchitekturfürintegrierten Daten / - und Videospeicher。
公开(公告)号：EP0571099A1
公开(公告)日：1993-11-24
申请号：EP93303452.2
申请日：1993-05-04
发明人： Testa, James , Frank, Edward , Bechtolsheim, Andreas , Creary, Trevor , Emberson, David , Storm, Shawn Fontaine , Hoffert, Bradley
CPC分类号： G06F13/4243 , G06F13/1663
摘要： A bus architecture and protocol for integrated data and video memory. A high speed dedicated memory bus is coupled to a memory controller. The memory controller is in turn coupled to a multiple processor bus interconnecting one or more processors. Single in-line memory modules (SIMMs) incorporating dynamic random access memory (DRAM), video RAM (VRAM), and static nonvolatile RAM (SRAM) are coupled to the memory bus. Bus control signals forming a bus protocol, and address and data lines from the memory controller are shared by all memory modules operating on the memory bus. Certain control signals invoke specific operations on memory modules or are ignored, depending on the type of memory module receiving the control signal. The memory modules incorporate the consistent protocol by virtue of a consistent control signal pin out. The SIMMs further incorporate buffering and conversion functions, thereby relieving the memory controller of service overhead associated with these functions. Integrating all forms of memory into a single data and video memory architecture permits a highly functional dedicated memory bus to be connected to the computer system.
摘要翻译： 用于集成数据和视频存储器的总线架构和协议。 高速专用存储器总线耦合到存储器控制器。 存储器控制器又耦合到互连一个或多个处理器的多处理器总线。 结合动态随机存取存储器（DRAM），视频RAM（VRAM）和静态非易失性RAM（SRAM）的单列直插存储器模块（SIMM）耦合到存储器总线。 形成总线协议的总线控制信号，以及来自存储器控制器的地址和数据线由在存储器总线上操作的所有存储器模块共享。 某些控制信号根据接收控制信号的存储器模块的类型，调用对存储器模块的特定操作或被忽略。 存储器模块通过一致的控制信号引脚引入一致的协议。 SIMM还包括缓冲和转换功能，从而减轻存储器控制器与这些功能相关联的业务开销。 将所有形式的存储器集成到单个数据和视频存储器架构中，允许将高度功能的专用存储器总线连接到计算机系统。
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公开(公告)号：EP0571099B1
公开(公告)日：1998-12-02
申请号：EP93303452.2
申请日：1993-05-04
发明人： Testa, James , Frank, Edward , Bechtolsheim, Andreas , Creary, Trevor , Emberson, David , Storm, Shawn Fontaine , Hoffert, Bradley
CPC分类号： G06F13/4243 , G06F13/1663
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公开(公告)号：EP0571092A3
公开(公告)日：1994-01-12
申请号：EP93303345.8
申请日：1993-04-28
IPC分类号： G11C5/00
CPC分类号： G11C5/04 , G11C5/00 , H05K1/117 , H05K1/141 , H05K1/181 , H05K3/403 , H05K2201/09645 , H05K2201/10689 , H05K2203/1572 , Y10S439/951
摘要： A single in-line memory module comprising:
a printed circuit card having a first and a second face and including connector means for coupling said printed circuit card to a circuit element;
a plurality of memory devices disposed on said first and second faces, said memory devices arranged in first, second and third configurations;
said first configuration comprising at least two memory elements disposed in a back to back position on said first and second faces and electrically coupled to one another;
said second configuration comprising at least two of said first configurations coupled to one another in a side by side arrangement;
said third configuration comprising at least two of said second configurations coupled together.摘要翻译： 一种单列直插式存储器模块，包括：印刷电路卡，其具有第一面和第二面并且包括用于将所述印刷电路卡耦合到电路元件的连接器装置; 布置在所述第一和第二面上的多个存储器件，所述存储器件布置成第一，第二和第三配置; 所述第一配置包括至少两个存储器元件，所述至少两个存储器元件在所述第一和第二面上以背靠背的方式设置并且彼此电耦合; 所述第二配置包括以并排布置彼此耦合的所述第一配置中的至少两个配置; 所述第三配置包括耦合在一起的至少两个所述第二配置。
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公开(公告)号：EP0571092B1
公开(公告)日：1999-09-01
申请号：EP93303345.8
申请日：1993-04-28
IPC分类号： G11C5/00
CPC分类号： G11C5/04 , G11C5/00 , H05K1/117 , H05K1/141 , H05K1/181 , H05K3/403 , H05K2201/09645 , H05K2201/10689 , H05K2203/1572 , Y10S439/951
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公开(公告)号：EP0813204A2
公开(公告)日：1997-12-17
申请号：EP97109219.2
申请日：1993-04-28
IPC分类号： G11C5/00
CPC分类号： G11C5/04 , G11C5/00 , H05K1/117 , H05K1/141 , H05K1/181 , H05K3/403 , H05K2201/09645 , H05K2201/10689 , H05K2203/1572 , Y10S439/951
摘要： A single in-line memory module comprising:
a printed circuit card having a first and a second face and including connector means for coupling said printed circuit card to a circuit element;
a plurality of memory devices disposed on said first and second faces, said memory devices arranged in first, second and third configurations;
said first configuration comprising at least two memory elements disposed in a back to back position on said first and second faces and electrically coupled to one another;
said second configuration comprising at least two of said first configurations coupled to one another in a side by side arrangement;
said third configuration comprising at least two of said second configurations coupled together.摘要翻译： 一种单列直插存储器模块，包括：具有第一和第二面的印刷电路卡，并且包括用于将所述印刷电路卡耦合到电路元件的连接器装置; 设置在所述第一和第二面上的多个存储器件，所述存储器件以第一，第二和第三配置布置; 所述第一配置包括至少两个设置在所述第一和第二表面上的背对背位置并且彼此电耦合的存储元件; 所述第二配置包括并排布置地彼此耦合的所述第一配置中的至少两个; 所述第三配置包括耦合在一起的所述第二配置中的至少两个。
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公开(公告)号：EP0926681A2
公开(公告)日：1999-06-30
申请号：EP99103587.4
申请日：1993-04-28
IPC分类号： G11C5/00
CPC分类号： G11C5/04 , G11C5/00 , H05K1/117 , H05K1/141 , H05K1/181 , H05K3/403 , H05K2201/09645 , H05K2201/10689 , H05K2203/1572 , Y10S439/951
摘要： A single in-line memory module comprising:
a printed circuit card having a first and a second face and including connector means for coupling said printed circuit card to a circuit element;
a plurality of memory devices disposed on said first and second faces, said memory devices arranged in first, second and third configurations;
said first configuration comprising at least two memory elements disposed in a back to back position on said first and second faces and electrically coupled to one another;
said second configuration comprising at least two of said first configurations coupled to one another in a side by side arrangement;
said third configuration comprising at least two of said second configurations coupled together.-
公开(公告)号：EP0926681A3
公开(公告)日：2000-11-22
申请号：EP99103587.4
申请日：1993-04-28
IPC分类号： G11C5/00
CPC分类号： G11C5/04 , G11C5/00 , H05K1/117 , H05K1/141 , H05K1/181 , H05K3/403 , H05K2201/09645 , H05K2201/10689 , H05K2203/1572 , Y10S439/951
摘要： A single in-line memory module comprising: a printed circuit card having a first and a second face and including connector means for coupling said printed circuit card to a circuit element; a plurality of memory devices disposed on said first and second faces, said memory devices arranged in first, second and third configurations; said first configuration comprising at least two memory elements disposed in a back to back position on said first and second faces and electrically coupled to one another; said second configuration comprising at least two of said first configurations coupled to one another in a side by side arrangement; said third configuration comprising at least two of said second configurations coupled together.
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公开(公告)号：EP0813204A3
公开(公告)日：1999-09-29
申请号：EP97109219.2
申请日：1993-04-28
IPC分类号： G11C5/00
CPC分类号： G11C5/04 , G11C5/00 , H05K1/117 , H05K1/141 , H05K1/181 , H05K3/403 , H05K2201/09645 , H05K2201/10689 , H05K2203/1572 , Y10S439/951
摘要： A single in-line memory module comprising:
a printed circuit card having a first and a second face and including connector means for coupling said printed circuit card to a circuit element; a plurality of memory devices disposed on said first and second faces, said memory devices arranged in first, second and third configurations; said first configuration comprising at least two memory elements disposed in a back to back position on said first and second faces and electrically coupled to one another; said second configuration comprising at least two of said first configurations coupled to one another in a side by side arrangement; said third configuration comprising at least two of said second configurations coupled together.摘要翻译： 一种单列直插式存储器模块，包括：印刷电路卡，其具有第一面和第二面并且包括用于将所述印刷电路卡耦合到电路元件的连接器装置; 布置在所述第一和第二面上的多个存储器件，所述存储器件布置成第一，第二和第三配置; 所述第一配置包括至少两个存储器元件，所述至少两个存储器元件在所述第一和第二面上以背靠背的方式设置并且彼此电耦合; 所述第二配置包括以并排布置彼此耦合的所述第一配置中的至少两个配置; 所述第三配置包括耦合在一起的至少两个所述第二配置。
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公开(公告)号：EP0813205A2
公开(公告)日：1997-12-17
申请号：EP97109220.0
申请日：1993-04-28
IPC分类号： G11C5/00
CPC分类号： G11C5/04 , G11C5/00 , H05K1/117 , H05K1/141 , H05K1/181 , H05K3/403 , H05K2201/09645 , H05K2201/10689 , H05K2203/1572 , Y10S439/951
摘要： A single in-line memory module comprising:
a printed circuit card having a first and a second face and including connector means for coupling said printed circuit card to a circuit element;
a plurality of memory devices disposed on said first and second faces, said memory devices arranged in first, second and third configurations;
said first configuration comprising at least two memory elements disposed in a back to back position on said first and second faces and electrically coupled to one another;
said second configuration comprising at least two of said first configurations coupled to one another in a side by side arrangement;
said third configuration comprising at least two of said second configurations coupled together.
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