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1.发明公开
公开(公告)号：EP4443725A1
公开(公告)日：2024-10-09
申请号：EP24166120.6
申请日：2024-03-26
CPC分类号： H02M1/0009 , G01R19/0092 , G01R31/42 , G01R31/343
摘要： A current detection method adapted to an inverter is provided, which includes: determining that a plurality of lower arms of an inverter have a minimum conduction period when all the lower arms are turned on simultaneously; determining a sampling time point according to the minimum conduction period, wherein a period from a starting point of the minimum conduction period to the sampling time point is defined as a sampling period that is close to the minimum conduction period; simultaneously detecting currents flowing through the lower arms by a plurality of detection resistors to generate a plurality of measurement voltages; and determining the currents of the inverter according to the measurement voltages.
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公开(公告)号：EP4439967A1
公开(公告)日：2024-10-02
申请号：EP22926339.7
申请日：2022-12-08
申请人： NSK Ltd.
发明人： KOBAYASHI, Takayuki , URYU, Kyosho
IPC分类号： H02P6/08
CPC分类号： H02P6/08 , B62D5/046 , H02P27/08 , H02M1/0009 , H02M7/53871 , H02M1/0025
摘要： There is provided a current detection device including a current detection unit (35a to 35f) configured to detect current flowing through a switching element of a lower-side arm (or an upper-side arm); a correction value calculation unit (50b) configured to calculate an offset correction value, based on a detection value of the current detected by the current detection unit in a period during which the switching element off during PWM control, and to hold and update the calculated offset correction value; and a correction unit (50c) configured to correct, by the offset correction value held by the correction value calculation unit, the detection value of the current detected by the current detection unit in a period during which the switching element is on. The correction value calculation unit (50b) is configured to not update the offset correction value in a case where a duty ratio of the PWM control is equal to or less than a duty ratio lower limit value (or equal to or greater than a duty ratio upper limit value).
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公开(公告)号：EP4407851A1
公开(公告)日：2024-07-31
申请号：EP23153894.3
申请日：2023-01-30
CPC分类号： H02M1/0009 , H02M1/32 , H02M3/155
摘要： The present document relates to overcurrent protection methods and devices. In particular, the present document relates to overcurrent protection methods and devices for gate drivers which are receiving short pulse width modulation (PWM) pulses. In particular, a method of detecting an overcurrent in a switched mode power supply comprising a high side switching element and a low side switching element is described. The method may comprise sensing, in a first mode of operation, during a first sensing time interval when the low side switching element is turned on, a first current indicative of a load current. The method may comprise detecting an overcurrent condition if the first current exceeds a first threshold value.
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公开(公告)号：EP3753095B1
公开(公告)日：2024-06-26
申请号：EP19701552.2
申请日：2019-01-31
CPC分类号： H02M1/14 , H02M1/15 , H02M1/4225 , Y02B70/10 , H02M1/0025 , H02M1/0009 , H02M3/1586
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公开(公告)号：EP4380027A1
公开(公告)日：2024-06-05
申请号：EP22210473.9
申请日：2022-11-30
CPC分类号： H02M3/1582 , H02M1/0003 , H02M1/0009 , H02M1/0025
摘要： The present invention generally relates to a buck-boost converter (2000) based ona finite state machine. In particular, the buck-boost converter (2000) comprises converting means (1100), for converting an input voltage (VIN) into an output voltage (VOUT), the converting means comprising a plurality of switches (1111-1114) and an inductor (1120) and a controller (2200) for controlling the plurality of switches (1111-1114). The operation of the controller is driven by a finite state machine (2400) configured to receive as input state change signals (VPWM_BCK, VPWM_BST) and to provide as output state signals (S1A-S3) for driving the controller (1200). The state change signals (VPWM_BCK, VPWM_BST) are generated by comparing means (2300) based on a comparison of a replica signal (VMOD) and an error signal (VEA), wherein the error signal (VEA) is computed on the basis of a signal representative of a difference between a characteristic of the converting means (1100) and a predetermined reference signal (VREF), and wherein the replica signal (VMOD) is representative of the current flowing through the inductor (1120).
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公开(公告)号：EP4374662A1
公开(公告)日：2024-05-29
申请号：EP22753652.1
申请日：2022-07-15
申请人： Signify Holding B.V.
发明人： GUO, Bing , ZHONG, Honghao , HUANG, Muhui , YU, Yefen
CPC分类号： H02M1/0009 , H02M1/0025 , H02M3/1566 , H02M3/156
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公开(公告)号：EP4443735A1
公开(公告)日：2024-10-09
申请号：EP23275059.6
申请日：2023-04-06
CPC分类号： H02M7/483 , H02M7/487 , H02M7/003 , H02M1/0006 , H02M1/0009
摘要： A multilevel power converter comprising: a DC bus having a positive terminal and a negative terminal; a plurality of switches for each of a plurality of phase legs of the power converter connected between the positive terminal and the negative terminal, each power leg having an output for provided a converted voltage output according to the switching control of the plurality of switches; and one or more current sensors (4), wherein at least two of the switches, or at least one of the switches and a current sensor, and/or at least two current sensors are connected as a cluster to share a common power supply.
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8.发明公开
公开(公告)号：EP4443734A1
公开(公告)日：2024-10-09
申请号：EP23167079.5
申请日：2023-04-06
CPC分类号： H02M7/483 , H02M7/487 , H02M1/0009 , H02M7/003 , H02M1/0006 , G01R31/42 , G01R31/3275
摘要： A multilevel power converter comprising: a DC bus having a positive terminal and a negative terminal; a plurality of switches (3a, 3b, 3c, 3d) for each of a plurality of phase legs of the power converter connected between the positive terminal and the negative terminal, each power leg having an output for provided a converted voltage output according to the switching control of the plurality of switches; and wherein a current sensor (4) provided in each phase leg connected in series between an adjacent pair (3a, 3b) of the plurality of switches.
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公开(公告)号：EP4433885A1
公开(公告)日：2024-09-25
申请号：EP22893977.3
申请日：2022-11-18
CPC分类号： H02M7/04 , H02M1/0009 , G01R31/40 , G01R19/16538 , H03F3/45475 , H03F2203/4552820130101 , H03F1/0222 , H03F3/72
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10.发明公开
公开(公告)号：EP4432542A1
公开(公告)日：2024-09-18
申请号：EP23207808.9
申请日：2023-11-03
发明人： CHU, Hung-Yuan , YEH, Chen-Wei
IPC分类号： H02M3/158
CPC分类号： H02M1/0009 , H02M3/1588 , H02M1/0054
摘要： A voltage converter capable of adjusting a zero-crossing reference current includes a first power switch, a second power switch, a current sensor circuit, a zero-crossing reference current source, and an adjustment circuit. The first power switch and the second power switch are coupled in series to generate an inductor current. The current sensor circuit is coupled to the second power switch to sense a current flowing through the second power switch and generate a sensing current. The zero-crossing reference current source outputs a zero-crossing reference current. The adjustment circuit is coupled to the current sensor circuit and the zero-crossing reference current source to receive the sensing current and the zero-crossing reference current, so as to control the second power switch and adjust the zero-crossing reference current according to the sensing current and the zero-crossing reference current.
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