公开(公告)号：EP4502754A1

公开(公告)日：2025-02-05

申请号：EP23188993.2

申请日：2023-08-01

Applicant: u-blox AG

Inventor： Martin, Benjamin ,  Baggini, Barbara ,  Anagnostopoulos, Dimitrios ,  Liakou, Fani ,  Blatter, Samuel

IPC: G05F1/46 ,  H03F3/45

Abstract: In one embodiment a buffer circuit for providing a floating reference signal comprises an operational amplifier comprising a first input, a second input, a third input and an output. The first input represents a non-inverting input and is configured to receive a first input signal. The second input represents another non-inverting input and is configured to receive a second input signal. The third input represents an inverting input. The output forms an output of the buffer circuit. The operational amplifier is configured as a voltage follower. The buffer circuit is configured to provide either the first or the second input signal at its output, such that a lower one of the first and the second input signal is provided as the floating reference signal.

公开(公告)号：EP4471533A1

公开(公告)日：2024-12-04

申请号：EP24177009.8

申请日：2024-05-21

Applicant: STMicroelectronics International N.V.

Inventor： NARWAL, Rajesh ,  -, Shashwat

IPC: G05F1/46 ,  G05F1/575

Abstract: The present disclosure is directed to a fully analog voltage regulator circuit with reference modulation (110). The voltage regulator circuit includes a low-dropout regulator (102), a voltage-to-current converter (106), a resistor-capacitor filter circuit (108), and an operational amplifier voltage buffer. The voltage regulator circuit minimizes dropout voltage of the circuit by comparing the output voltage of the voltage regulator to a reference voltage (V REF) and adjusting the output voltage of the op amp voltage buffer, accordingly. The voltage regulator circuit includes two operational amplifiers, wherein the negative input of a first of the two operational amplifiers is coupled to the negative input of a second of the two operational amplifiers through the resistor-capacitor filter circuit (108).

公开(公告)号：EP4439226A1

公开(公告)日：2024-10-02

申请号：EP23213085.6

申请日：2023-11-29

Applicant: INTEL Corporation

Inventor： LURIA, Kosta ,  ZELIKSON, Michael ,  GIL, Lior

IPC: G05F1/59 ,  G05F1/46 ,  G05F1/575 ,  G05F1/563

CPC classification number: G05F1/59 ,  G05F1/575 ,  G05F1/462 ,  G05F1/563

Abstract: Embodiments herein relate to a Digital Linear Voltage Regulator (DLVR). The DLVR includes a set of power links which each includes many columns of power transistors. The columns can be turned on or off individually based on digital data from a main control circuit. Additionally, individual power links can be turned on or off based on monitoring of a dropout voltage of the set of power links and a drain-to-source resistance, Rds_on, of replica columns. An input voltage may be monitored as an alternative. The monitoring compensates for changes in Rds_on due to changes in an input voltage, Vin, which could otherwise result in unstable behavior. The DLVR can avoid the complexity and power losses of dynamic biasing of the control gate voltages of the transistors.

公开(公告)号：EP4433885A1

公开(公告)日：2024-09-25

申请号：EP22893977.3

申请日：2022-11-18

Applicant: Seron Electronics Ltd.

Inventor： MIRVAKILI, Seyed Mohammad ,  SIM, Douglas Hak Hian

IPC: G05F1/46 ,  G01R19/25 ,  G05B13/02 ,  H02J1/00 ,  H02M7/04 ,  H03F3/68

CPC classification number: H02M7/04 ,  H02M1/0009 ,  G01R31/40 ,  G01R19/16538 ,  H03F3/45475 ,  H03F2203/4552820130101 ,  H03F1/0222 ,  H03F3/72

公开(公告)号：EP4413433A1

公开(公告)日：2024-08-14

申请号：EP22789777.4

申请日：2022-09-21

Applicant: QUALCOMM INCORPORATED

Inventor： ZHANG, Xu ,  HUANG, Xuhao ,  ZHAO, Shitong

IPC: G05F1/46 ,  G05F1/565

CPC classification number: G05F1/462 ,  G05F1/468 ,  H03K5/131 ,  G05F1/565

公开(公告)号：EP4387094A1

公开(公告)日：2024-06-19

申请号：EP23211435.5

申请日：2023-11-22

Applicant: Nokia Solutions and Networks Oy

Inventor： FERRISS, Mark ,  IOTTI, Lorenzo ,  RYLYAKOV, Alexander

IPC: H03F3/45 ,  H03F1/02 ,  H03F3/08 ,  H03F3/14 ,  G05F1/46

CPC classification number: H03F3/45089 ,  H03F3/14 ,  H03F2203/4572220130101 ,  H03F2203/4541820130101 ,  H03F2203/4500820130101 ,  H03F3/087 ,  H03F2203/4552820130101 ,  H03F3/45511 ,  H03F3/45497 ,  H03F1/0233 ,  G05F1/461

Abstract: An apparatus, such as a coherent optical receiver, includes a trans-impedance amplifier, TIA, (410) and a low dropout, LDO, voltage regulator circuit for providing a supply voltage (VCCREG) to the TIA (410). The LDO circuit is configured to adjust the supply voltage responsive to a DC voltage (VCMOUT) at an output of the TIA (410). In some implementations the LDO circuit may provide only a fraction of a supply current to the TIA (410), with another fraction provided by a partial current replica source.

公开(公告)号：EP3724670B1

公开(公告)日：2024-05-01

申请号：EP18836996.1

申请日：2018-12-12

IPC: G05F1/46 ,  G06F1/324 ,  G06F1/3296 ,  G01R31/30

CPC classification number: G01R31/3004 ,  G01R31/3016 ,  G06F1/3296 ,  G05F1/462 ,  G06F1/324 ,  Y02D10/00

公开(公告)号：EP3685501B1

公开(公告)日：2024-03-13

申请号：EP18780005.7

申请日：2018-09-17

Inventor： KING, Eric J. ,  SMITH, Eric B.

IPC: H02M3/158 ,  H02M3/157 ,  G05F1/46 ,  H02M1/00

公开(公告)号：EP4268129A1

公开(公告)日：2023-11-01

申请号：EP20967950.5

申请日：2020-12-28

Applicant: Silicon Craft Technology Public Company Limited (SICT)

Inventor： SIRINAMARATANA, Pairote ,  CHOKCHALERMWAT, Pattrakorn

IPC: G06K19/07 ,  G05F3/26 ,  G05F1/56 ,  G05F1/10 ,  G05F1/46 ,  G05F1/44

公开(公告)号：EP4264395A1

公开(公告)日：2023-10-25

申请号：EP21907377.2

申请日：2021-09-20

Applicant: INTEL Corporation

Inventor： TIAGARAJ, Sathya Narasimman ,  PASDAST, Gerald ,  BURTON, Edward

IPC: G05F1/565 ,  G05F1/46