公开(公告)号：EP0119089A2

公开(公告)日：1984-09-19

申请号：EP84301649.4

申请日：1984-03-12

申请人： FUJITSU LIMITED

发明人： Kuroda, Shigeru

IPC分类号： H01L21/306 ,  H01L27/08 ,  H01L21/82 ,  H01L21/76 ,  H01L29/80

CPC分类号： H01L29/80 ,  H01L21/30621 ,  H01L21/7605 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0883 ,  H01L27/095 ,  H01L29/7787 ,  H01L29/802 ,  Y10S438/97

摘要： A method of manufacturing a GaAs semiconductor device of an enhancement/depletion, E/D, construction having a GaAs/AlGaAs heterojunction and using a two-dimensional electron gas, includes the steps of forming a heterojunction semiconductor substrate and etching a portion of the substrate to provide a gate portion of a depletion-mode FET DM. The substrate comprises a semi-insulating GaAs layer 1, an undoped GaAs layer 2, an N-type AlGaAs layer 4 forming an electron-supply layer, and a GaAs layer. The GaAs layer comprises a first GaAs layer 5, an etching stopping AlGaAs layer 6, and a second GaAs layer 7, with the first GaAs layer 5 being formed on the N-type GaAs layer 4. The etching step to provide the gate portion is preferably carried out by a dry etching method using an etchant of CCI 2 F 2 gas, so that the second GaAs layer 7 is etched but the AlGaAs layer 6 is not etched. Thus, the thickness of the layers between a gate electrode 19GD of the depletion-mode FET, DM and the GaAs 5 AlGaAs 4 hetero- junction plane is determined during the formation of the heterojunction substrate, so that a better uniformity of the threshold voltage of depletion-mode FET DM is obtained.

公开(公告)号：EP0011477B1

公开(公告)日：1983-07-20

申请号：EP79302552.9

申请日：1979-11-13

申请人： XEROX CORPORATION

发明人： Yeh, Keming W.

IPC分类号： H01L21/00 ,  H01L21/82 ,  H01L21/28 ,  H01L29/80 ,  H01L27/08

CPC分类号： H01L29/66848 ,  H01L21/033 ,  H01L21/8234 ,  H01L27/095 ,  H01L29/812