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200 条记录 (耗时 0.013 秒)

    Multi-level charge-coupled devices memory system
    102.
    发明公开
    Multi-level charge-coupled devices memory system 失效
    与几个层次的电荷耦合存储器设备。

    公开(公告)号：EP0031891A2

    公开(公告)日：1981-07-15

    申请号：EP80107227.3

    申请日：1980-11-20

    申请人： International Business Machines Corporation

    发明人： Terman, Lewis Madison ,  Yee, Yen Sung

    IPC分类号： G11C19/00 ,  G11C11/56 ,  G11C19/28

    CPC分类号： G11C11/565 ,  G11C7/16 ,  G11C19/36

    摘要： A digital-to-analog conversion (DAC) circuit (32) and trigger comparator (34) combination is described for encoding and decoding charge packets in a common-well multi-level signal charge-coupled memory device (CCD). The DAC circuit, which may be of the weighted capacitor type, is used to generate a staircase waveform and to create the common-well under a first gate (14) in the CCD. The trigger comparator adjacent to a second gate (16) in the CCD is a detection circuit which stays in one binary state until an input charge signal is received, whereupon it switches state, In particular, the weighted capacitor DAC contains an extra offset bit which is used in the analog-to-digital or regeneration operation such that when the trigger comparator (34) switches state, the digital input to the DAC (32) at that time correctly represents the signal charge being converted. In one embodiment a circular serial-parallel-serial memory structure (37) is employed as the multi-level CCD memory system.

    Document reproduction system with two original document feed devices
    103.
    发明公开
    Document reproduction system with two original document feed devices 无效
    Dokumenten-Reproduktions-System mit zwei Vorlagen-Zuführvorrichtungen。

    公开(公告)号：EP0023544A1

    公开(公告)日：1981-02-11

    申请号：EP80103058.6

    申请日：1980-06-02

    申请人： International Business Machines Corporation

    发明人： Bach, Paul Stanley ,  Harding, Steven Ray ,  Lamos, Richard Allen ,  Markham, Harvey Rossen ,  Shepherd, Roger Dean

    IPC分类号： G03B27/62 ,  G03G15/00 ,  B65H3/44

    CPC分类号： G03G15/602 ,  B65H3/44 ,  G03B27/625

    摘要： A copier includes an automatic document feeder (16) a semi-automatic document feeder (14) and a control system coupled to the feeders by busses A to D. A control button 122, when depressed, causes the control system to switch into a suspending/commencing mode in which a current copying task employing one of the feeders is suspended and a further copying task employing the other feeder is entered. At the end of the further task, the current task continues from the point at which it was suspended.

    摘要翻译： 复印机包括自动送稿器（16），半自动文件馈送器（14）和通过总线A至D耦合到馈线的控制系统。当按下时，控制按钮122使控制系统切换到暂停 /开始模式，其中暂停使用其中一个馈线的当前复制任务，并且进入使用另一个馈线的另外的复制任务。 在进一步的任务结束时，目前的任务从停止的时候开始。

    Method of increasing the speed of a computer system and a computer system for high speed operation
    104.
    发明公开
    Method of increasing the speed of a computer system and a computer system for high speed operation 失效
    一种用于增加计算机系统和计算机系统的速度为高速的处理方法。

    公开(公告)号：EP0021097A2

    公开(公告)日：1981-01-07

    申请号：EP80102987.7

    申请日：1980-05-29

    申请人： International Business Machines Corporation

    发明人： Schorr, Herbert ,  Waldawsky-Berger, Irving

    IPC分类号： G06F12/08 ,  G06F12/10

    CPC分类号： G06F9/30138 ,  G06F9/30101 ,  G06F9/30163 ,  G06F9/30167 ,  G06F9/35 ,  G06F9/383 ,  G06F12/0864

    摘要： In a computer system the operating speed is increased by increasing the number of general registers (4) with a plurality of implicit registers (9) in an associative memory (3). An instruction (6) generated in a processing unit (1) for data access provides parameter words, such as base and displacement words, to be used as search arguments for an associative search for data in the implicit registers. If a match occurs, the data from the selected register is transferred to the processing unit (1) and the address generation started by the instruction for a memory (2) access is terminated.

    摘要翻译： 在计算机系统中的操作速度是由具有隐式寄存器的多元性增加的通用寄存器（4）的数目增加的关联存储器（9）（3）。 在处理单元（1），用于数据存取生成的指示（6）提供参数字，：如碱和位移也就是说，要被用作用于关联搜索参数来搜索在所述隐式寄存器中的数据。 如果出现匹配的，从所选择的寄存器中的数据被传送到所述处理单元（1）和地址生成由（2）访问被终止的存储器中的指令启动。

    Method and apparatus for focusing elastic waves
    105.
    发明公开
    Method and apparatus for focusing elastic waves 失效
    Verfahren und Apparat zur Fokussierung弹性织物Wellen。

    公开(公告)号：EP0019082A1

    公开(公告)日：1980-11-26

    申请号：EP80101913.4

    申请日：1980-04-10

    申请人： International Business Machines Corporation

    发明人： Tynan, Eugene Edward ,  Dreyfus, Russell Warren ,  von Gutfeld, Robert Jacob

    IPC分类号： G10K10/00 ,  G10K11/32

    CPC分类号： G10K15/046 ,  G01N2291/02827 ,  G10K11/32

    摘要： Pulse light is applied through a piano concave lens (14) to a thin metal film (15), which is evaporated on the concave side of the lens. The lens, which is formed of a high thermally insulating material such as glass, for example, and the film are disposed within a liquid (11) such as water, for example. The pulsed light is absorbed by the metal film, which converts the thermal energy produced by the pulsed light into elastic waves in the form of acoustic waves and simultaneously focuses the acoustic waves on an ojbect (20) within the water at a selected focal plane. The metal film is as thin as possible, consistent with complete absorption of the light energy by the metal film, so as to utilize the high thermal expansion coefficient of the water.

    摘要翻译： 脉冲光通过平凹透镜（14）施加到在透镜的凹面上蒸发的薄金属膜（15）。 例如，由诸如玻璃的高绝热材料形成的透镜和膜设置在诸如水的液体（11）内。 脉冲光被金属膜吸收，其将由脉冲光产生的热能转换成声波形式的弹性波，同时将声波聚焦在选定焦平面内的水中的物体（20）上。 金属膜尽可能薄，与金属膜完全吸收光能一致，以利用水的高热膨胀系数。

    Push-pull driver circuit and its use in a programmed logic array
    106.
    发明公开
    Push-pull driver circuit and its use in a programmed logic array 失效
    推动Treibschaltung和ihre Verwendung在einer程序设计师logischen Anordnung。

    公开(公告)号：EP0006531A2

    公开(公告)日：1980-01-09

    申请号：EP79101908.6

    申请日：1979-06-12

    申请人： International Business Machines Corporation

    发明人： Schuster, Stanley Everett

    IPC分类号： H03K19/02 ,  H03K19/08 ,  G11C7/06

    CPC分类号： H03K19/017 ,  H03K19/018507 ,  H03K19/17708

    摘要： A push-pull driver circuit wherein the input signal (1) is applied to turn on one (6) of two transistors (5, 6) mounted in series and the inversion of that signal is applied to the second transistor (5) in the series path and the output taken from between then operates to isolate the load and since one and only one of the two transistors in the series path is conducting there is a path to charge and discharge the load capacitance (3) but no path through both devices for power dissipation. The driver circuit can be built into a 2-bit partitioning circuit (23) which in turn, when used with a programmed logic array (20) and the relative capacitance of the various parts being isolated from each other byacoupling circuit (54) , the resulting assembly provides a high performance programmed array logic device.

    摘要翻译： 推挽驱动器电路，其中施加输入信号以接通串联安装的两个晶体管中的一个，并且该信号的反相被施加到串联路径中的第二晶体管，并且从它们之间获取的输出操作以隔离负载 并且由于串联路径中的两个晶体管中的一个并且仅一个导通，所以存在对负载电容进行充电和放电的路径，但是没有通过两个器件的路径用于功率耗散。 驱动器电路可以内置在2位分配电路中，而后者又与编程逻辑阵列一起使用，并且各个部件的相对电容通过耦合电路彼此隔离，所得到的组件提供了高性能编程 阵列逻辑器件。