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公开(公告)号：EP0588169A1
公开(公告)日：1994-03-23
申请号：EP93114057.8
申请日：1993-09-02
摘要： A clamp system for use in a television receiver having tuner (16) and auxiliary (14) video sources, comprises an IF AGC and video detector circuit (43) having an AGC reference voltage input (REF V2) and an auxiliary video input signal clamp circuit (66) having a reference voltage input (REF V5). The detector circuit and the clamp circuit are each formed on a common integrated circuit (30) along with a video switch (42) for selecting video signals provided by said detector and clamp circuits. The integrated circuit further includes a reference voltage source (62) and a bias generator (60) for deriving the AGC reference voltage and the auxiliary input signal clamp voltage from the common source.
摘要翻译： 一种用于具有调谐器（16）和辅助（14）视频源的电视接收机中的钳位系统，包括具有AGC参考电压输入（REF V2）和辅助视频输入信号钳位的IF AGC和视频检测器电路（43） 电路（66）具有参考电压输入（REF V5）。 检测器电路和钳位电路各自与视频开关（42）一起形成在公共集成电路（30）上，用于选择由所述检测器和钳位电路提供的视频信号。 集成电路还包括用于从公共源导出AGC参考电压和辅助输入信号钳位电压的参考电压源（62）和偏置发生器（60）。
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公开(公告)号：EP0535742A2
公开(公告)日：1993-04-07
申请号：EP92202958.2
申请日：1992-09-25
IPC分类号： H04N5/18
CPC分类号： H04N5/18
摘要： A signal source (SV) applies a signal having a fixed low frequency modulation added thereto through a capacitor (CS) to a line (L) to which is connected a first clamping means comprising a first voltage controlled current amplifier or transconductor (A1), a second input of which receives a reference voltage (VR1). The transconductor (A1) output is applied through a first switch means (S1) to the line (L) which switch means (S1) is periodically closed during a defined clamp period in the signal. A filter (BP) is also connected to the line (L) having a pass band centred on the frequency of the modulation which periodically samples the signal during the clamp period. The filter (BP) output is applied to a second transconductor (A2) having a transconductance greater than that of the first transconductor (A1) a second input of which receives a second reference voltage (VR2). The output of the second transconductance (A2) is applied through second switch means (S2) to the line L periodically closed during a defined period in said signal other than the clamp signal.
摘要翻译： 信号源（SV）通过电容器（CS）施加具有固定的低频调制的信号到线路（L），线路（L）与包括第一压控电流放大器或跨导器（A1）的第一钳位装置连接， 其第二输入端接收参考电压（VR1）。 通过第一开关装置（S1）将跨导体（A1）输出施加到线路（L），开关装置（S1）在信号中的限定钳位周期期间周期性地闭合。 滤波器（BP）也连接到具有以调制频率为中心的通带的线（L），其在钳位周期期间周期性地采样信号。 滤波器（BP）输出被施加到跨导大于第一跨导体（A1）的跨导的第二跨导体（A2），其第二输入接收第二参考电压（VR2）。 通过第二开关装置（S2）将第二跨导（A2）的输出施加到周期性地闭合的线路L，该线路L在除了钳位信号之外的所述信号中的限定的周期期间闭合。
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103.发明公开Clamp circuit for clamping video signal including synchronizing signal 失效Klammschaltung zur Klemmung eines同义词相关视频信号。
公开(公告)号：EP0532354A1
公开(公告)日：1993-03-17
申请号：EP92308306.7
申请日：1992-09-11
IPC分类号： H04N5/18
摘要： The clamp circuit of the present invention includes a comparator 9, a pulse signal generating circuit 10, an integrating circuit 12 and a subtractor 17. The comparator 9 compares a composite video signal with a threshold potential and detects a composite synchronizing signal. The pulse signal generating circuit 10 generates pulse signals S1 and S2 showing which of the detected composite synchronizing signal and a reference time period (t) is larger. The integrating circuit 12 corrects a threshold potential in response to the pulse signals S1 and S2 such that the pulse width of the horizontal synchronizing signal of the composite video signal corresponds to the reference time period t. The subtractor 17 subtracts the threshold potential from the composite video signal, so as to fix the DC level of the composite video signal at a prescribed potential. Since a threshold potential which makes constant the pulse width of the synchronizing pulse signals is generated and the video signal is clamped by using this threshold potential, the video signal including the synchronizing signal is made less susceptible to the influence of noise and the like, and clamping operation of the video signal can be done more accurately.
摘要翻译： 本发明的钳位电路包括比较器9，脉冲信号发生电路10，积分电路12和减法器17.比较器9将复合视频信号与阈值电位进行比较，并检测复合同步信号。 脉冲信号发生电路10生成检测出的合成同步信号和基准时间段（t）中的哪一个的脉冲信号S1和S2。 积分电路12响应于脉冲信号S1和S2校正阈值电位，使得复合视频信号的水平同步信号的脉冲宽度对应于参考时间段t。 减法器17从复合视频信号中减去阈值电位，以将复合视频信号的DC电平固定在规定的电位。 由于产生使同步脉冲信号的脉冲宽度恒定的阈值电位，并且通过使用该阈值电位来钳位视频信号，所以使包括同步信号的视频信号不易受到噪声等的影响，并且 可以更准确地进行视频信号的钳位动作。
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公开(公告)号：EP0301601B1
公开(公告)日：1993-03-03
申请号：EP88112453.1
申请日：1988-08-01
发明人： Goto, Hiroshige
CPC分类号： H04N5/18
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公开(公告)号：EP0519095A1
公开(公告)日：1992-12-23
申请号：EP91109917.4
申请日：1991-06-17
IPC分类号： H04N5/18
CPC分类号： H04N5/18
摘要： Die Klemmschaltung weist einen zwischen eine Eingangsklemme (1) und eine Ausgangsklemme (2) geschalteten Klemmkondensator (4) auf. Die Ausgangsklemme (2) ist über eine Schalteinrichtung an eine niederohmige Spannungsquelle (6) geschaltet. Eine Einrichtung (7) stellt Einschaltimpulse (8) für die Schalteinrichtung (5) zu Zeitpunkten bereit, zu denen das Videosignal ein Synchronsignal aufweist. Damit wird eine getastete Klemmung erreicht.
Dies ist besonders dann von Vorteil, wenn das Videosignal sich symmetrisch zu seinem Nullpegel ändert (MAC-Signale).摘要翻译： 钳位电路具有连接在输入端子（1）和输出端子（2）之间的钳位电容器（4）。 输出端子（2）通过开关装置连接到低阻抗电压源（6）。 在视频信号呈现同步信号的时间，设备（7）为开关设备（5）提供接通脉冲（8）。 这导致键锁。 这特别是当视频信号相对于它的零电平（MAC信号）对称地改变时。
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公开(公告)号：EP0462804A3
公开(公告)日：1992-02-26
申请号：EP91305509.1
申请日：1991-06-18
发明人： Ozaki, Hidetoshi , Goukura, Akira
IPC分类号： H04N5/18
CPC分类号： H04N5/18
摘要： A video signal clamper includes a DC level shifting circuit for controlling a DC component of an input analog video signal in response to a bias voltage and an A-D converter for converting the input analog video signal from the DC level shifting circuit into a digital video signal. A D-A converter (10) is provided for generating the bias voltage. A difference value corresponding to the difference between the value of the digital video signal and a value corresponding to a clamp level of the input analog video signal is applied through a full integral type digital filter (9) to the D-A converter (10). This full integral type digital filter (9) supplies to the D-A converter (10) the sum of the last difference value and the present difference value so as to renew the former. Therefore, the clamp level is precisely maintained.
摘要翻译： 视频信号钳位器包括用于响应于偏置电压控制输入模拟视频信号的DC分量的DC电平移位电路和用于将来自DC电平移位电路的输入模拟视频信号转换为数字视频信号的A-D转换器。 提供D-A转换器（10）以产生偏置电压。 对应于数字视频信号的值与对应于输入的模拟视频信号的钳位电平的值的差值通过全积分型数字滤波器（9）施加到D-A转换器（10）。 该全积分型数字滤波器（9）向D-A转换器（10）提供最后一个差值和当前差值的总和，以便更新前者。 因此，钳位水平被精确地维持。
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公开(公告)号：EP0424111A2
公开(公告)日：1991-04-24
申请号：EP90311351.2
申请日：1990-10-17
申请人： SONY CORPORATION
摘要： Video signal processing apparatus is provided for use with a video camera (13) having a line scanning line period during which useful video information is provided and a flyback period during which an optical black signal level. Replacement black signal information that is a function of the optical black signal level is inserted (17) into a portion of the flyback period. When the camera (13) is of the type having a complementary colour matrix filter which produces odd and even raster scan lines of image pick-up signals with different modulation components, contour correction is provided. Modulation components in a scan line of image pick-up signals caused by the patterns of filter elements included in the matrix are removed (56), thereby producing an averaged scan line of image signals from which is extracted a signal component that is uncorrelated from one line to the next. Prior to such extraction, that portion of an averaged scan line of image signals which exceeds a predetermined level that is less than the lowest average level of a scan line of image signals which would saturate video processing circuitry (67, 69, 70) is clipped (61, 63, 65). The extracted, uncorrelated signal component is combined (73) with an averaged scan line of image signals to produce a contour-emphasized luminance signal.
摘要翻译： 视频信号处理装置被提供用于具有在其中提供有用的视频信息的行扫描行周期的摄像机（13）和在其内的光黑信号电平的回扫周期。 作为光学黑色信号电平的函数的替换黑色信号信息被插入（17）到回扫周期的一部分。 当相机（13）是具有互补色彩矩阵滤波器的类型时，其产生具有不同调制分量的奇摄像扫描线和偶数光栅扫描线的图像拾取信号，提供轮廓校正。 除去由矩阵中包含的滤波器元件的图案引起的图像拾取信号的扫描线中的调制分量（56），从而产生图像信号的平均扫描线，从其中提取与一个不相关的信号分量 行到下一个 在这种提取之前，超过预定水平的图像信号的平均扫描线的那部分小于图像信号的扫描线的最低平均电平，该图像信号将使视频处理电路（67,69,70）饱和 （61,63,65）。 提取的，不相关的信号分量与图像信号的平均扫描线组合（73）以产生轮廓强调的亮度信号。
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公开(公告)号：EP0396746A1
公开(公告)日：1990-11-14
申请号：EP88910096.2
申请日：1988-11-17
发明人： KAWAHARA, Isao
摘要： A picture receiver controller comprising an analog clamper (30) for clamping input signals, and A/D converter (31) for subjecting the output of the analog clamper (30) to the A/D conversion, a digital filter (32) for applying arithmetic operation of predeter- , mined frequency characteristics to the output of the A/D converter (31), a timing generating circuit (33) 'which controls the frequency characteristics of the digital filter (32) and controls the counter circuit (36), ,a data selector (34) which switches the output of the digital filter (32) and the data bus (382) of CPU (38) and feeds to a RAM (35), and an address selector (37) which switches the output of the counter circuit (36) and the address bus (381) of CPU (38) to feed to the RAM (35). The CPU (38) operates the data stored in the RAM (35) such that a clamp level signal is produced from the first D/A converter (39), a gain control signal is produced from a second D/A converter (40), and a noise induction signal is produced from the output port (41) of the CPU (38).
摘要翻译： 控制数字滤波器（32）的频率特性的定时发生电路（33）控制计数器电路（36）。 数据选择器（34）将CPU（38）的数字滤波器（32）和数据总线（382）的输出切换到RAM（35）。 地址选择器选择器将CPU（38）的计数器电路（36）的输出和地址总线（381）切换到RAM（35）。 CPU（38）操作存储在RAM（35）中的数据，使得从第一D / A转换器（39）产生钳位电平信号，从第二D / A转换器（40）产生增益控制信号， 并且从CPU（38）的输出端口（41）产生噪声感应信号。
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公开(公告)号：EP0391643A1
公开(公告)日：1990-10-10
申请号：EP90303507.9
申请日：1990-04-02
IPC分类号： H04N5/18
CPC分类号： H04N5/18
摘要： A digital signal clamp circuit is realized using an adder (28) and an up/down counter (18). The digital signal is coupled to one input of the adder (28) and the counter output is coupled to a second input of the adder. The up/down counter (18) is enabled to count only during signal intervals exhibiting the desired clamping level. The counter is controlled to count up or down depending on the polarity of the signal provided by the adder. The count value in the counter is continuously applied to the adder to provide clamping. Using a truncated count value from the counter enhances clamping performance.
摘要翻译： 使用加法器（28）和升降计数器（18）实现数字信号钳位电路。 数字信号耦合到加法器（28）的一个输入，并且计数器输出耦合到加法器的第二输入端。 上/下计数器（18）只能在显示期望的钳位电平的信号间隔期间进行计数。 根据加法器提供的信号的极性，计数器被控制为向上或向下计数。 计数器中的计数值连续施加到加法器以提供钳位。 使用计数器的截断计数值增强了夹紧性能。
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